Certain aspects of the present disclosure provide methods and apparatus for autonomous receive (RX) detection. One example method for wireless communications generally includes powering down a portion of a receive path in a first module; detecting, in a second module comprising another portion of the receive path, that a radio frequency (RF) signal has been received by the second module while the portion of the receive path in the first module is powered down; and sending a control signal to power up the portion of the receive path in the first module, based on the detection.

Processing a digital bit stream and systems for implementing the methods are provided. The method includes dividing the digital bit stream into a plurality of data packets. In a first processing block performing a carrier recovery error calculation on a first portion of the plurality of data packets, comprising preforming a first phase locked loop (PLL) function on decimated data of the data packets and performing a carrier recovery operation on the first portion of the plurality of data packets. In a second processing block, in parallel with the processing of the first portion of the plurality of packets, performing the carrier recovery error calculation on a second portion of the plurality of data packets, comprising preforming the first PLL function on decimated data of the data packets and performing the carrier recovery operation on second portion of the plurality of data packets.

A receiver including a plurality of correlators to receive a satellite signal having a line of sight (LOS) component and a multipath (MP) component and generate correlator results corresponding to the received satellite signal. The receiver includes a peak search module to identify frequency peaks in the received satellite signal based on the correlator results, a peak selection module to identify the LOS component of the received satellite signal based on the identified frequency peaks and at least one of a code phase error module to generate a code phase error corresponding to the identified LOS component and a carrier frequency error module to generate a carrier frequency error corresponding to the identified LOS component. The plurality of correlators are further to generate the correlator results based on at least one of the code phase error and the carrier frequency error.

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase; when the data signal is oscillating at the first phase, output a first logic value; and when the data signal is oscillating at the second phase, output a second logic value, the output of the fast phase change detection circuit being used to determine whether the first output signal or the second output signal will be utilized in the feedback loop of the low bandwidth phase lock loop.

Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase; when the data signal is oscillating at the first phase, output a first logic value; and when the data signal is oscillating at the second phase, output a second logic value, the output of the fast phase change detection circuit being used to determine whether the first output signal or the second output signal will be utilized in the feedback loop of the low bandwidth phase lock loop.

Processing a digital bit stream and systems for implementing the methods are provided. The method includes dividing the digital bit stream into a plurality of data packets. In a first processing block performing a carrier recovery error calculation on a first portion of the plurality of data packets, comprising preforming a first phase locked loop (PLL) function on decimated data of the data packets and performing a carrier recovery operation on the first portion of the plurality of data packets. In a second processing block, in parallel with the processing of the first portion of the plurality of packets, performing the carrier recovery error calculation on a second portion of the plurality of data packets, comprising preforming the first PLL function on decimated data of the data packets and performing the carrier recovery operation on second portion of the plurality of data packets.

A radio communication device has an analog control loop unit to generate an analog control signal that adjusts a phase of a voltage control oscillation signal, a digital control loop unit to generate a digital control signal having a frequency determined by a frequency of a reference signal and a predetermined frequency setting code signal and a phase opposite to a phase of the analog control signal, a voltage controlled oscillator to generate the voltage control oscillation signal, a data slicer to generate a digital signal including the reception signal, an automatic offset controller to generate a correction signal in response to an error between a frequency of the reception signal and a frequency of the voltage control oscillation signal, and a setting code adjuster to adjust the frequency setting code signal, wherein gain of the digital control loop unit is higher than gain of the analog control loop unit.

Certain aspects of the present disclosure provide methods and apparatus for autonomous receive (RX) detection. One example method for wireless communications generally includes powering down a portion of a receive path in a first module; detecting, in a second module comprising another portion of the receive path, that a radio frequency (RF) signal has been received by the second module while the portion of the receive path in the first module is powered down; and sending a control signal to power up the portion of the receive path in the first module, based on the detection.

An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.