Physical-layer security is provided by obfuscating or concealing the structure of the signal being transmitted, such that recovery of the underlying information is prohibitively expensive or even impossible. A digital filter implemented within a digital signal processor at the transmitter device introduces an obfuscation function. A digital filter implemented within a digital signal processor at the receiver device removes the obfuscation function. The obfuscation function conceals information bits to be conveyed by a modulated carrier signal. In some versions, the obfuscation function digitally modifies the phases of individual frequency components of the drive signals used to generate the modulated carrier signal. In other versions, the obfuscation function digitally modifies the phases and amplitudes of individual frequency components of the drive signals used to generate the modulated carrier signal.

A correlation computation method includes: performing, by a grouping circuit, a grouping operation upon a data sequence according to an in-phase code sequence and a quadrature code sequence, wherein the data sequence is derived from a quadrature phase shift keying (QPSK) modulated signal; performing at least one accumulation operation upon data samples categorized into at least one data sample group by the grouping operation, to generate at least one accumulation result; and deriving a correlation value between the data sequence and both of the in-phase code sequence and the quadrature code sequence from the at least one accumulation result.

A receiver for a modulated signal of a communication system is disclosed. The receiver includes a demodulator to demodulate the received modulated symbols of a received signal into received soft-bits. The receiver also includes a hard-decision decoder that is configured to decode the received soft-bits into decoded bits. A feedback loop is included to provide feedback from the hard decision decoder to the demodulator. The feedback loop is configured to re-encode the decoded bits from the hard-decision decoder into re-encoded bits. The demodulator is further configured to iteratively demodulate the received modulated signal using an output of the feedback loop.

Receivers and methods of operation are described. A receiver for a modulated signal of a communication system, comprises a demodulator to demodulate the received modulated symbols of a received signal into received soft-bits. A hard-decision decoder is arranged and configured to decode the received soft-bits into decoded bits. A feedback loop is arranged to provide feedback from the hard decision decoder to the demodulator. the feedback loop is configured to re-encode the decoded bits from the hard-decision decoder into re-encoded bits. The demodulator is further arranged and configured to iteratively demodulate the received modulated signal using an output of the feedback loop.

A correlation computation method includes: performing, by a grouping circuit, a grouping operation upon a data sequence according to an in-phase code sequence and a quadrature code sequence, wherein the data sequence is derived from a quadrature phase shift keying (QPSK) modulated signal; performing at least one accumulation operation upon data samples categorized into at least one data sample group by the grouping operation, to generate at least one accumulation result; and deriving a correlation value between the data sequence and both of the in-phase code sequence and the quadrature code sequence from the at least one accumulation result.

A method of dynamic range extension for heterodyne fiber-optic Interferometers, and more particularly towards the use of instantaneous carrier to extend the dynamic range of heterodyne fiber-optic interferometers. The method includes the providing of a heterodyne fiber-optic interferometer having a demodulator and an associated carrier frequency. The method also includes the determining of demodulator excessions. The detecting of the demodulator excessions and the determining of an appropriate correction factor is based on information from the instantaneous carrier frequency. The method also includes the introduction of the appropriate correction factor to the demodulator.

A digital I/Q reprocessing demodulator and a process for significantly reducing arctangent computational loads. This is done by ensuring that all calculations are carried out in the linear part of the curve. The architecture of the demodulator is such that the demodulator 100 utilizes two I/Q stages. The first stage is utilized to determine a phase offset with regards to the free-running I/Q clocks. In the second processing stage, the phase of the I/Q reference signals are phase shifted based on the initial estimate such that the incoming carrier signal is nearly in-phase.