Receiver circuitry for a communication system includes signal processing circuitry, voltage digital-to-analog converter (DAC) circuitry, and slicer circuitry. The signal processing circuitry receives a data signal and generate a processed data signal. The voltage DAC circuitry generates a first threshold reference voltage. The slicer circuitry is coupled to an output of the signal processing circuitry. The slicer circuitry includes a capture flip-flop (CapFF) circuit that receives the processed data signal and the first threshold reference voltage. The CapFF circuit further generates a first data signal. The first CapFF circuit includes a first offset compensation circuit that adjusts a parasitic capacitance of the first CapFF circuit.

Receiver circuitry for a communication system includes signal processing circuitry, voltage digital-to-analog converter (DAC) circuitry, and slicer circuitry. The signal processing circuitry receives a data signal and generate a processed data signal. The voltage DAC circuitry generates a first threshold reference voltage. The slicer circuitry is coupled to an output of the signal processing circuitry. The slicer circuitry includes a capture flip-flop (CapFF) circuit that receives the processed data signal and the first threshold reference voltage. The CapFF circuit further generates a first data signal. The first CapFF circuit includes a first offset compensation circuit that adjusts a parasitic capacitance of the first CapFF circuit.

A unified mud-pulse (MP)-electromagnetic (EM) telemetry assembly and a downhole telemetry tool are provided including a downhole EM telemetry transmitter apparatus. The EM telemetry transmitter apparatus comprises a modulator configured to transmit at least one EM signal through transmission medium. The modulator comprises a first reactive circuit and a second reactive circuit, and a plurality of switches controlled by a controller to alternatingly switch the modulator between a first configuration and a second configuration. The EM signals are transmitted by passing one of the reactive circuits and bypassing the other reactive circuit.

This application provides a communication method and apparatus. The method includes: A terminal device receives an MCS index value from a network device, and determines, in an MCS index table, a modulation method and a target bit rate that correspond to the MCS index value, where a maximum target bit rate corresponding to a π/2 BPSK modulation method in the MCS index table is greater than a first threshold, so that the terminal device can achieve higher spectral efficiency when performing uplink transmission by using the π/2 BPSK modulation method, thereby improving uplink performance.

Receiver circuitry for a communication system includes signal processing circuitry, voltage digital-to-analog converter (DAC) circuitry, and slicer circuitry. The signal processing circuitry receives a data signal and generate a processed data signal. The voltage DAC circuitry generates a first threshold reference voltage. The slicer circuitry is coupled to an output of the signal processing circuitry. The slicer circuitry includes a capture flip-flop (CapFF) circuit that receives the processed data signal and the first threshold reference voltage. The CapFF circuit further generates a first data signal. The first CapFF circuit includes a first offset compensation circuit that adjusts a parasitic capacitance of the first CapFF circuit.

Receiver circuitry for a communication system includes signal processing circuitry, voltage digital-to-analog converter (DAC) circuitry, and slicer circuitry. The signal processing circuitry receives a data signal and generate a processed data signal. The voltage DAC circuitry generates a first threshold reference voltage. The slicer circuitry is coupled to an output of the signal processing circuitry. The slicer circuitry includes a capture flip-flop (CapFF) circuit that receives the processed data signal and the first threshold reference voltage. The CapFF circuit further generates a first data signal. The first CapFF circuit includes a first offset compensation circuit that adjusts a parasitic capacitance of the first CapFF circuit.

A method is provided. In some examples, the method includes generating, by processing circuitry, a spread of chips representing an input bit. In addition, the method includes converting, by the processing circuitry, the spread of chips to a plurality of symbols comprising a pair of symbols. The method also includes mapping, by the processing circuitry, the pair of symbols to a single carrier signal and generating, by the processing circuitry, a radio-frequency (RF) signal based on the single carrier signal. The method further includes transmitting, by the processing circuitry via an antenna, the RF signal.

One example discloses a first near-field device, including: a controller configured to establish a near-field communications link with a second near-field device; wherein the controller is configured to monitor a characteristic of the near-field communications link; wherein the controller is configured to select a first modulation encoding for transmitting a near-field signal if the characteristic is greater than a first characteristic threshold; and wherein the controller is configured to select a second modulation encoding for transmitting the near-field signal if the characteristic is less than the first characteristic threshold but greater than a second characteristic threshold.

One example discloses a first near-field device, including: a controller configured to establish a near-field communications link with a second near-field device; wherein the controller is configured to monitor a characteristic of the near-field communications link; wherein the controller is configured to select a first modulation encoding for transmitting a near-field signal if the characteristic is greater than a first characteristic threshold; and wherein the controller is configured to select a second modulation encoding for transmitting the near-field signal if the characteristic is less than the first characteristic threshold but greater than a second characteristic threshold.

An method of determining a symbol according to a phase difference between input signals input in order of time may include calculating a first phase difference between a phase of a first previous signal received prior to a target signal and a phase of a second previous signal received prior to the first previous signal; calculating a second phase difference between a phase of the target signal and the phase of the second previous signal; calculating target likelihoods based on the first phase difference and the second phase difference; and determining an expected phase difference between the target signal and the first previous signal or an expected symbol for the target signal, based on the target likelihoods.