H04L49/102

Synchronized processing of process data and delayed transmission

A data bus subscriber and a method for processing data, wherein the data bus subscriber can be connected to a local bus, particularly a ring bus, and the data bus subscriber has an input interface, which can be connected to the local bus, for receiving first local bus data, an output interface, which can be connected to the local bus, for transmitting second local bus data, a processing component for synchronous processing of the first local bus data and/or data stored in a memory and for output of at least one control signal, a logic unit, which is adapted in order to modify a quantity of received first local bus data based on the control signal in order to generate the second local bus data to be transmitted, wherein the logic unit is further adapted for synchronous, delayed transmitting of the second local bus data via the output interface.

Automatic multi-stage fabric generation for FPGAs
11509605 · 2022-11-22 · ·

Systems and methods to automatically or manually generate various multi-stage pyramid network based fabrics, either partially connected or fully connected, are disclosed by changing different parameters of multi-stage pyramid network including such as number of slices, number of rings, number of stages, number of switches, number of multiplexers, the size of the multiplexers in any switch, connections between stages of rings either between the same numbered stages (same level stages) or different numbered stages, single or multi-drop hop wires, hop wires of different hop lengths, hop wires outgoing to different directions, hop wires incoming from different directions, number of hop wires based on the number and type of inlet and outlet links of large scale sub-integrated circuit blocks. One or more parameters are changed in each iteration so that optimized fabrics are generated, at the end of iterations, to route a given set of benchmarks or designs having a specific connection requirements.

Automatic multi-stage fabric generation for FPGAs
11509605 · 2022-11-22 · ·

Systems and methods to automatically or manually generate various multi-stage pyramid network based fabrics, either partially connected or fully connected, are disclosed by changing different parameters of multi-stage pyramid network including such as number of slices, number of rings, number of stages, number of switches, number of multiplexers, the size of the multiplexers in any switch, connections between stages of rings either between the same numbered stages (same level stages) or different numbered stages, single or multi-drop hop wires, hop wires of different hop lengths, hop wires outgoing to different directions, hop wires incoming from different directions, number of hop wires based on the number and type of inlet and outlet links of large scale sub-integrated circuit blocks. One or more parameters are changed in each iteration so that optimized fabrics are generated, at the end of iterations, to route a given set of benchmarks or designs having a specific connection requirements.

Intermediary device for daisy chain and tree configuration in hybrid data/power connection

A plurality of intermediary devices may be interposed in a hybrid data/power connection between a power source and a powered device. In one aspect, the intermediary devices may be connected in series. Such connecting may be referred to as “daisy chaining.” In other aspects, the intermediary devices may be connected in a tree or a mesh. Each intermediary device may be configured to consume, for its own use, power that is supplied over the hybrid data/power connection and to deliver remaining power over the hybrid data/power connection to at least one other device. Furthermore, each intermediary device may be configured to independently route data and power to downstream devices.

Automated link aggregation group configuration system

An automated Link Aggregation Group (LAG) configuration system includes a plurality of slave switch devices that are each coupled to an endhost device by at least one respective link. Each of the plurality of slave switch devices receives a Link Aggregation Group (LAG) communication from the endhost device, and forwards endhost device information in that LAG communication to a master switch device. The master switch device receives endhost device information from each of the plurality of slave switch devices and determines that each of the plurality of slave switch devices are coupled to the endhost device. In response, the master switch device sends a LAG instruction to each of the plurality of slave switch devices that causes the at least one respective link that couples each of the plurality of slave switch devices to the endhost device to be configured in a LAG.

Automated link aggregation group configuration system

An automated Link Aggregation Group (LAG) configuration system includes a plurality of slave switch devices that are each coupled to an endhost device by at least one respective link. Each of the plurality of slave switch devices receives a Link Aggregation Group (LAG) communication from the endhost device, and forwards endhost device information in that LAG communication to a master switch device. The master switch device receives endhost device information from each of the plurality of slave switch devices and determines that each of the plurality of slave switch devices are coupled to the endhost device. In response, the master switch device sends a LAG instruction to each of the plurality of slave switch devices that causes the at least one respective link that couples each of the plurality of slave switch devices to the endhost device to be configured in a LAG.

TRANSPORT CONTROL WORD ARCHITECTURE FOR PHYSICAL PORT MIRRORING

Aspects include receiving, at an input/output (I/O) processor, a transport control word (TCW) that includes an instruction to perform physical port mirroring. It is identified, by the I/O processor, a first port to be mirrored and a second port to perform the mirroring. The second port is a physical port on a host bus adapter (HBA). In response to outbound data being sent to the first port for transmission to a first target device and to the instruction specifying outbound port mirroring, the I/O processor sends a copy of the outbound data to a second target device via the second port. In response to receiving inbound data at the first port and to the instruction specifying inbound port mirroring, a copy of the inbound data is transmitted to the second target device via the second port.

TRANSPORT CONTROL WORD ARCHITECTURE FOR PHYSICAL PORT MIRRORING

Aspects include receiving, at an input/output (I/O) processor, a transport control word (TCW) that includes an instruction to perform physical port mirroring. It is identified, by the I/O processor, a first port to be mirrored and a second port to perform the mirroring. The second port is a physical port on a host bus adapter (HBA). In response to outbound data being sent to the first port for transmission to a first target device and to the instruction specifying outbound port mirroring, the I/O processor sends a copy of the outbound data to a second target device via the second port. In response to receiving inbound data at the first port and to the instruction specifying inbound port mirroring, a copy of the inbound data is transmitted to the second target device via the second port.

Self-checking node

In an example, a method includes forming a first self-checking pair including a self-checking node and a first node adjacent to the self-checking node in a network. The method further includes forming a second self-checking pair including the self-checking node and a second node adjacent to the self-checking node in the network, wherein the self-checking node is between the first node and the second node. The method further includes transmitting a first paired broadcast with the first self-checking pair and transmitting a second paired broadcast with the second self-checking pair.

Self-checking node

In an example, a method includes forming a first self-checking pair including a self-checking node and a first node adjacent to the self-checking node in a network. The method further includes forming a second self-checking pair including the self-checking node and a second node adjacent to the self-checking node in the network, wherein the self-checking node is between the first node and the second node. The method further includes transmitting a first paired broadcast with the first self-checking pair and transmitting a second paired broadcast with the second self-checking pair.