A disclosed method may include storing, within a hardware memory device included as part of a rate—distortion optimization (RDO) hardware pipeline, at least one transform unit table that (1) is pregenerated from a seed probability table for transformation of video data in accordance with a video encoding standard, (2) corresponds to a transform operation supported by the video encoding standard, and (3) corresponds to a transform unit included in the RDO hardware pipeline. The method may also include determining, by accessing the transform unit table, an RDO token rate for an encoding of the video data by a hardware video encoding pipeline that includes the RDO hardware pipeline, and selecting, based on the RDO token rate, a transform operation for the encoding of the video data.

A disclosed method may include storing, within a hardware memory device included as part of a rate—distortion optimization (RDO) hardware pipeline, at least one transform unit table that (1) is pregenerated from a seed probability table for transformation of video data in accordance with a video encoding standard, (2) corresponds to a transform operation supported by the video encoding standard, and (3) corresponds to a transform unit included in the RDO hardware pipeline. The method may also include determining, by accessing the transform unit table, an RDO token rate for an encoding of the video data by a hardware video encoding pipeline that includes the RDO hardware pipeline, and selecting, based on the RDO token rate, a transform operation for the encoding of the video data.

A method of processing video data of a picture is described, the method including: allocating memory for a decoded picture in a decoded picture buffer, DPB, the decoded picture comprising pixels representing video data; receiving a bitstream comprising decoding units, DUs, and storing the DUs in a coded picture buffer, CRB, the DUs representing a coded picture that needs to be decoded into the decoded picture, each of the DUs representing a coded block of pixels; determining if, during decoding of the coded picture, at least one partial output can be performed, the at least one partial output including copying the one or more decoded DUs from the DPB to a data sink, while one or more DUs of the coded picture are not yet decoded and removed the CPB, the one or more decoded DUs representing a part of the decoded picture; and, or performing the at least one partial output if the processor determines that the at least one partial output can be performed, the performing including marking the one or more decoded DUs stored in the DPB as being ready for partial output, the marking signaling the decoder apparatus not to remove the one or more decoded DUs from the DPB; and, copying the one or more marked decoded DUs from the DPB to the data sink without removing the one or more decoded DU from the DPB.

A disclosed system may include a hardware distortion data pipeline that may include (1) a quantization module that generates a quantized data set, (2) an inverse quantization module that generates, from the quantized data set, an inverse quantized data set by executing an inverse quantization of the quantized data set, and (3) an inverse transformation module that generates an inversely transformed data set by executing an inverse transformation of the inverse quantized data set. The system may also include a hardware determination pipeline that determines a distortion metric based on the inversely transformed data set and the residual frame data set, and a hardware token rate pipeline that determines, based on the quantized data set, a token rate for an encoding of the residual frame data set via a video encoding pipeline. Various other methods, systems, and computer-readable media are also disclosed.

A disclosed system may include a hardware distortion data pipeline that may include (1) a quantization module that generates a quantized data set, (2) an inverse quantization module that generates, from the quantized data set, an inverse quantized data set by executing an inverse quantization of the quantized data set, and (3) an inverse transformation module that generates an inversely transformed data set by executing an inverse transformation of the inverse quantized data set. The system may also include a hardware determination pipeline that determines a distortion metric based on the inversely transformed data set and the residual frame data set, and a hardware token rate pipeline that determines, based on the quantized data set, a token rate for an encoding of the residual frame data set via a video encoding pipeline. Various other methods, systems, and computer-readable media are also disclosed.

An apparatus (200) for receiving an input video data stream according to an embodiment is provided. The input video data stream has a video encoded thereinto. The apparatus (200) is configured to generate an output video data stream from the input video data stream.

An apparatus (200) for receiving an input video data stream according to an embodiment is provided. The input video data stream has a video encoded thereinto. The apparatus (200) is configured to generate an output video data stream from the input video data stream.

A decoding device includes a controller classifying a bitstream as a first bitstream and a second bitstream based on a plurality of blocks defined by a matrix and included in a frame, a first decoder including a first processor performing decoding on the first bitstream and outputting first decoding data and a first memory, a second decoder including a second processor performing decoding on the second bitstream and outputting second decoding data and a second memory, a first buffer transmitting the first decoding data to the second memory, and a second buffer transmitting the second decoding data to the first memory. The first processor controls the second memory to store the first decoding data, and the second processor controls the first memory to store the second decoding data.

An apparatus includes circuitry configured to: partition an input tensor into one or more block tensors; partition at least one of the block tensors into one or more continuation bands, the one or more continuation bands being associated with a caching counter having a value; store the one or more continuation bands in a cache managed using a cache manager; retrieve, prior to a convolution or pooling operation on a current block tensor, the one or more continuation bands of a previous block tensor from the cache that are adjacent to a current block tensor; concatenate the retrieved continuation bands with the current block tensor; apply the convolution or pooling operation on the current block tensor after the concatenation; decrease the respective caching counter value of the retrieved continuation bands; and clear the continuation bands from the cache when its respective caching counter reaches a value of zero.

An apparatus includes circuitry configured to: partition an input tensor into one or more block tensors; partition at least one of the block tensors into one or more continuation bands, the one or more continuation bands being associated with a caching counter having a value; store the one or more continuation bands in a cache managed using a cache manager; retrieve, prior to a convolution or pooling operation on a current block tensor, the one or more continuation bands of a previous block tensor from the cache that are adjacent to a current block tensor; concatenate the retrieved continuation bands with the current block tensor; apply the convolution or pooling operation on the current block tensor after the concatenation; decrease the respective caching counter value of the retrieved continuation bands; and clear the continuation bands from the cache when its respective caching counter reaches a value of zero.