A video processing method includes checking, during a conversion from a coded representation of a current video block to the current video block, a position of a last non-zero coefficient of the current video block, wherein the position is relative to a top-left position of the current video block; and performing a determination, based on the position, whether or not to parse a syntax element which signals a transform information in the coded representation.

A better compromise between encoding complexity and achievable rate distortion ratio, and/or to achieve a better rate distortion ratio is achieved by using multitree sub-divisioning not only in order to subdivide a continuous area, namely the sample array, into leaf regions, but using the intermediate regions also to share coding parameters among the corresponding collocated leaf blocks. By this measure, coding procedures performed in tiles—leaf regions—locally, may be associated with coding parameters individually without having to, however, explicitly transmit the whole coding parameters for each leaf region separately. Rather, similarities may effectively exploited by using the multitree subdivision.

An apparatus and method for multi-adapter and/or multi-pass encoding on dual graphics processors. For example, one embodiment of a processor comprises: a central processor integrated on a first die, the central processor comprising a plurality of cores to execute instructions and process data; an first graphics processor integrated on the first die, the first graphics processor comprising media processing circuitry to perform one or more preliminary lookahead operations on video content to generate lookahead statistics; an interconnect to couple the first graphics processor to a lookahead buffer, the first graphics processor to transmit the lookahead statistics over the interconnect to the lookahead buffer; wherein the lookahead statistics are to be used by a second graphics processor to encode the video content to generate encoded video.

Disclosed approaches may provide for non-blocking video processing pipelines that have the ability to efficiently share transform hardware resources. Transform hardware resources may be shared across processing parameters, such as pixel block dimensions, transform types, video stream bit depths, and/or multiple coding formats, as well as for inter-frame and intra-frame encoding. The video processing pipeline may be divided into phases, each phase having half-butterfly circuits to perform a respective portion of computations of a transform. The phases may be selectable and configurable to perform transforms for multiple different combinations of the processing parameters. In each configuration, the phases may be capable of performing a transform by a sequential pass through at least some of the phases resulting in high throughput. Approaches are also described related to improving the performance and efficiency of transpose operations of transforms.

Example embodiments provide a system for training a data coding pipeline including a feature extractor neural network, an encoder neural network, and a decoder neural network configured to reconstruct input data based on encoded features. A plurality of losses corresponding to different tasks may be determined for the coding pipeline. Tasks may be performed based on an output of the coding pipeline. A weight update may be determined for at least a subset of the coding pipeline based on the plurality of losses. The weight update may be configured to reduce a number of iterations for fine-tuning the coding pipeline for one of the tasks. This enables faster adaptation of the coding pipeline for one of the tasks after deployment of the coding pipeline. Apparatuses, methods, and computer programs are disclosed. Apparatuses, methods, and computer programs are disclosed.

Disclosed approaches may provide for non-blocking video processing pipelines that have the ability to efficiently share transform hardware resources. Transform hardware resources may be shared across processing parameters, such as pixel block dimensions, transform types, video stream bit depths, and/or multiple coding formats, as well as for inter-frame and intra-frame encoding. The video processing pipeline may be divided into phases, each phase having half-butterfly circuits to perform a respective portion of computations of a transform. The phases may be selectable and configurable to perform transforms for multiple different combinations of the processing parameters. In each configuration, the phases may be capable of performing a transform by a sequential pass through at least some of the phases resulting in high throughput. Approaches are also described related to improving the performance and efficiency of transpose operations of transforms.

Innovations in video decoding and rendering operations for inter-coded blocks in a graphics pipeline, in which at least some of the operations are performed using a graphics processing unit (“GPU”), are described. For example, a video playback tool receives encoded data for a current picture and performs operations to decode the encoded data and reconstruct the current picture. For a given inter-coded block of the current picture, a graphics primitive represents texture values as a point for processing by the GPU. The graphics primitive can have one or more attributes, including a motion vector, a block size, a display index value (indicating a location in a display buffer), and/or a residual index value (indicating a location of residual values). The operations performed by the video playback tool can include interpolation of sample values at fractional-sample offsets and motion compensation performed for inter-coded blocks in multiple passes for different block sizes.

A block processing pipeline in which macroblocks are input to and processed according to row groups so that adjacent macroblocks on a row are not concurrently at adjacent stages of the pipeline. The input method may allow chroma processing to be postponed until after luma processing. One or more upstream stages of the pipeline may process luma elements of each macroblock to generate luma results such as a best mode for processing the luma elements. Luma results may be provided to one or more downstream stages of the pipeline that process chroma elements of each macroblock. The luma results may be used to determine processing of the chroma elements. For example, if the best mode for luma is an intra-frame mode, then a chroma processing stage may determine a best intra-frame mode for chroma and reconstruct the chroma elements according to the best chroma intra-frame mode.

Aspects of the disclosure provide methods and an apparatus including processing circuitry that decodes coded information of a coding block (CB) in a picture from a coded video bitstream. The coded information indicates a width W and a height H of the CB. The processing circuitry partitions the CB into sub-processing units (SPUs) having a width being a minimum one of W and K and a height being a minimum one of H and K. At least one of the width W and the height H is larger than a processing data unit size K. The processing circuitry determines a partitioning structure to partition the SPUs based on the width, the height, and a maximum transform unit (TU) size M. At least one of the width and the height is larger than M. The processing circuitry partitions each of the SPUs into TUs of M×M based on the partitioning structure.

Provided is a method for decoding an image. The method may include deciding a prediction mode that corresponds to a chroma component block; deciding a transform skip mode of the chroma component block from a plurality of transform skip mode candidates, according to the prediction mode that corresponds to the chroma component block; and reverse-transforming the chroma component block on the basis of the transform skip mode that is decided.