A device (40) for generating a watermarked stream (39), comprising: at least one input interface (41) configured to receive encrypted control messages (20) and conditional access streams (30) including a main stream (33) and protected watermarking data streams (35) from which a watermarking information (38) can be embedded in said watermarked stream (39); a security module (43) configured to process said control messages (20) and to control access to said conditional access streams (30); a descrambler (45) configured to remove protection applied on at least some of said conditional access streams (30); a watermarking unit (47) configured to generate the watermarked stream (39) from said conditional access streams (30) by selectively processing said watermarking data streams (35) depending on access data (AC, AR) included in some of said control messages (20).

A method of encoding and encrypting input data (D1) to generate corresponding encoded and encrypted data (E2) is provided. The input data (D1) is encoded to generate intermediate encoded data streams. The intermediate encoded data streams include at least one critical data stream that is critical and essential for subsequent decoding of one or more remaining data streams of the intermediate encoded data streams. The at least one critical data stream is encrypted using one or more encryption algorithms to generate at least one intermediate encrypted data stream. Subsequently, unencrypted portions of the intermediate encoded data streams are merged together with the at least one intermediate encrypted data stream to generate the encoded and encrypted data (E2).

A signal processing apparatus, signal processing method, program, and signal transmission system can transmit 8K or 4K video signals stably through a device of 100 Gbps. A signal processor includes a mapping unit configured to map an 8K or 4K video signal onto first data streams, prescribed by a predetermined format, of plural channels, and a multiplexer configured to generate plural first data blocks by scrambling the first data streams of either odd-numbered or even-numbered channels, first bits by first bits, invert the polarity of data blocks which are part of the first data blocks, generate plural second data blocks by 8B/10B-converting the first data streams of the other channels, second bits by second bits, and generate serial second data streams of plural lanes by multiplexing the first data blocks and the second data blocks. The processor is applicable to a broadcasting camera, for example.

A device (40) for generating a watermarked stream (39), comprising: at least one input interface (41) configured to receive encrypted control messages (20) and conditional access streams (30) including a main stream (33) and protected watermarking data streams (35) from which a watermarking information (38) can be embedded in said watermarked stream (39); a security module (43) configured to process said control messages (20) and to control access to said conditional access streams (30); a descrambler (45) configured to remove protection applied on at least some of said conditional access streams (30); a watermarking unit (47) configured to generate the watermarked stream (39) from said conditional access streams (30) by selectively processing said watermarking data streams (35) depending on access data (AC, AR) included in some of said control messages (20).

A method for generating, from initial content data, output content data for provision to one or more receivers, wherein the initial content data is encoded according to a coding scheme, wherein for a quantity of data encoded according to the coding scheme, the coding scheme provides a mechanism for including in the quantity of encoded data additional data such that a decoder for the coding scheme, upon decoding the quantity of encoded data, does not use the additional data to generate decoded data, the method comprising: selecting one or more portions of the initial content data; for each selected portion, generating a data construct that comprises a plurality of data structures, each data structure comprising data, including a version of the selected portion, that is encrypted using a corresponding encryption process different from each encryption process used to encrypt data in the other data structures, wherein the data construct is arranged such that using a decryption process that corresponds to the encryption process for one data structure on the encrypted data in each data structure in the data construct produces a quantity of data encoded according to the coding scheme that uses the mechanism so that a decoder for the coding scheme would not use any data structure in the data construct other than said one data structure; and using the generated data constructs in the initial content data instead of their corresponding selected portions to form the output content data.

A method of encoding and encrypting input data (D1) to generate corresponding encoded and encrypted data (E2) is provided. The input data (D1) is encoded to generate intermediate encoded data streams. The intermediate encoded data streams include at least one critical data stream that is critical and essential for subsequent decoding of one or more remaining data streams of the intermediate encoded data streams. The at least one critical data stream is encrypted using one or more encryption algorithms to generate at least one intermediate encrypted data stream. Subsequently, unencrypted portions of the intermediate encoded data streams are merged together with the at least one intermediate encrypted data stream to generate the encoded and encrypted data (E2).

A signal processing apparatus, signal processing method, program, and signal transmission system can transmit 8K or 4K video signals stably through a device of 100 Gbps. A signal processor includes a mapping unit configured to map an 8K or 4K video signal onto first data streams, prescribed by a predetermined format, of plural channels, and a multiplexer configured to generate plural first data blocks by scrambling the first data streams of either odd-numbered or even-numbered channels, first bits by first bits, invert the polarity of data blocks which are part of the first data blocks, generate plural second data blocks by 8B/10B-converting the first data streams of the other channels, second bits by second bits, and generate serial second data streams of plural lanes by multiplexing the first data blocks and the second data blocks. The processor is applicable to a broadcasting camera, for example.