Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus capable not only of having advanced global shutter and autofocus functions but also of sufficiently achieving single exposure high dynamic range (SEHDR) performance, thereby substantially realizing enhanced dynamic range and frame rate.

In an image capturing mode, a reading part controls driving of a conversion signal reading part such that the conversion signal reading part keeps first and second transfer transistors in a conduction state in the same transfer period and performs a read-out operation on a pixel signal corresponding to a sum of charges stored in a first photodiode and charges stored in a second photodiode with a first conversion gain and subsequently with a second conversion gain.

An imaging element according to an embodiment includes: a unit pixel including a first pixel having a first photoelectric conversion element and including a second pixel having a second photoelectric conversion element, the second pixel being arranged adjacent to the first pixel; and an accumulation portion that accumulates a charge generated by the second photoelectric conversion element and converts the accumulated charge into a voltage. The accumulation portion is disposed at a boundary between the unit pixel and another unit pixel adjacent to the unit pixel.

An image capturing apparatus generates an image of a high dynamic range that takes into account gain in addition to a range of change of storage capacitance. The image capturing apparatus having an image capturing device of a structure in which blocks each configured by a plurality of photoelectric conversion elements are arranged, includes a first control circuit, a second control circuit, and a generating circuit. The first control circuit is configured to control sensitivity in units of the blocks. The second control circuit is configured to control a gain of a signal for each block obtained by the image capturing device. The generating circuit is configured to, by mapping image data of blocks obtained under the control of the second control circuit to a region that accords with sensitivity set for the blocks in a preset high dynamic range, generate image data of the high dynamic range.

A solid-state imaging device includes a photoelectric converter, a transfer gate transistor, and an overflow gate transistor. The photoelectric converter is provided in a semiconductor substrate and generates photocharge. The transfer gate transistor is provided at a surface of the semiconductor substrate as a vertical transistor and reads the photocharge stored in the photoelectric converter. The overflow gate transistor is provided at the surface of the semiconductor substrate as a planar transistor and transfers the photocharge overflowing from the photoelectric converter.

A solid-state imaging device includes a photoelectric converter, a transfer gate transistor, and an overflow gate transistor. The photoelectric converter is provided in a semiconductor substrate and generates photocharge. The transfer gate transistor is provided at a surface of the semiconductor substrate as a vertical transistor and reads the photocharge stored in the photoelectric converter. The overflow gate transistor is provided at the surface of the semiconductor substrate as a planar transistor and transfers the photocharge overflowing from the photoelectric converter.

Transistor structures for a transistor may include a first source-drain region, a second source-drain region, and a channel region between the first and second source-drain regions overlapped by a gate structure. Transistor structures may be formed in a well of a first doping type. Isolation structures having the first doping type may be formed within the well. A lightly doped implant region of a second doping type for each of the source-drain regions may be formed within the well and separated from the isolation structures. A heavily doped surface implant region of the first doping type may extend across the surface of the well and cover the lightly doped implant region of each source-drain region. The surface implant region may be formed by patterning or by a blanket implantation process across the transistor structures.

Transistor structures for a transistor may include a first source-drain region, a second source-drain region, and a channel region between the first and second source-drain regions overlapped by a gate structure. Transistor structures may be formed in a well of a first doping type. Isolation structures having the first doping type may be formed within the well. A lightly doped implant region of a second doping type for each of the source-drain regions may be formed within the well and separated from the isolation structures. A heavily doped surface implant region of the first doping type may extend across the surface of the well and cover the lightly doped implant region of each source-drain region. The surface implant region may be formed by patterning or by a blanket implantation process across the transistor structures.

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a photodetection region and a drain region electrically coupled to the photodetection region, and the photodetection region may be configured to induce an intrinsic electric field in a direction from the photodetection region to the drain region(s). In some embodiments, an integrated circuit may comprise a plurality of pixels and a control circuit configured to control a transfer of charge carriers in a plurality of time-binning pixels. In some embodiments, an optical component for optical rejection is provided in between a waveguide and the time-binning pixel and configured to block at least some excitation photons in a pulsed light stream from arriving at the photodetection region. In some embodiments, the time-binning pixel does not comprise a time-gated transistor for electronic rejection configured to block a transfer of charge carriers associated with excitation photons in the pulsed light stream.

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a photodetection region and a drain region electrically coupled to the photodetection region, and the photodetection region may be configured to induce an intrinsic electric field in a direction from the photodetection region to the drain region(s). In some embodiments, an integrated circuit may comprise a plurality of pixels and a control circuit configured to control a transfer of charge carriers in a plurality of time-binning pixels. In some embodiments, an optical component for optical rejection is provided in between a waveguide and the time-binning pixel and configured to block at least some excitation photons in a pulsed light stream from arriving at the photodetection region. In some embodiments, the time-binning pixel does not comprise a time-gated transistor for electronic rejection configured to block a transfer of charge carriers associated with excitation photons in the pulsed light stream.

An image sensor having a shield including, for example, a metal, is above an electrical charge storage element in a pixel region to block light incident toward the electrical charge storage element, thereby making it possible to reduce or prevent reading a charge value including leakage charge introduced to the electrical charge storage element, and thus adversely affecting an image result.