Provided are a solid-state imaging device capable of improving image quality of a captured image even if the pixel size is increased, and an electronic device equipped with the solid-state imaging device. A solid-state imaging device is provided that includes: at least two column areas that perform Analog To Digital (AD) conversion of a pixel signal generated by a pixel; a plurality of vertical signal lines that transfers the pixel signal to the column areas; and a free area in which the plurality of vertical signal lines is not wired, in which two of the vertical signal lines facing each other sandwiching the free area are arranged, and lengths of the two vertical signal lines are substantially equal to each other.

An image sensing device includes an image sensing circuit, a voltage supply grid, bitlines, and a control circuit. The image sensing circuit includes pixels arranged in rows and columns. Each one of the bitlines is coupled to a corresponding one of the columns. The voltage supply grid is coupled to the pixels. The control circuit is coupled to output at least a row select signal and a transfer signal to the rows. Each one of the rows is selectively coupled to the bitlines to selectively output image data signals in response to the row select signal and the transfer signal. Each one of the rows is further selectively coupled to the bitlines to selectively clamp the bitlines in response to the row select signal and the transfer signal. Each one of the rows is selectively decoupled from the bitlines in response to the row select signal.

An image sensing device includes an image sensing circuit, a voltage supply grid, bitlines, and a control circuit. The image sensing circuit includes pixels arranged in rows and columns. Each one of the bitlines is coupled to a corresponding one of the columns. The voltage supply grid is coupled to the pixels. The control circuit is coupled to output at least a row select signal and a transfer signal to the rows. Each one of the rows is selectively coupled to the bitlines to selectively output image data signals in response to the row select signal and the transfer signal. Each one of the rows is further selectively coupled to the bitlines to selectively clamp the bitlines in response to the row select signal and the transfer signal. Each one of the rows is selectively decoupled from the bitlines in response to the row select signal.

In a solid state imaging element in which whether or not an address event has occurred is detected, the circuit area in each pixel is reduced.

A driving circuit supplies a prescribed reference signal the level of which gradually fluctuates with lapse of time. A plurality of pixels each includes an auto-zero transistor and a reset control section. The auto-zero transistor initializes a change amount acquisition section for obtaining a brightness change amount. The reset control section switches the auto-zero transistor by using the reference signal in a case where a prescribed address event has occurred.

An image sensor includes a first photoelectric conversion unit that converts light incident through a first opening to an electric charge, a second photoelectric conversion unit that converts light incident through a second opening which is smaller than the first opening to an electric charge, and a signal output wiring that outputs a first signal generated by the electric charge converted by the first photoelectric conversion unit and a second signal generated by the electric charge converted by the second photoelectric conversion unit. The second photoelectric conversion unit is disposed between the second opening and the signal output wiring.

An image sensor includes a pixel array that includes a first pixel group located in a first row and including a first select transistor and a first floating diffusion region, a second pixel group located in a second row and including a second select transistor and a second floating diffusion region, and a column line connected to both the first pixel group and the second pixel group. While charges generated by a photoelectric conversion element of the first pixel group are transferred to the first floating diffusion region, the first select transistor is turned off, the second select transistor is turned on, and a first voltage is applied to the column line through the second select transistor. A photoelectric conversion element of the second pixel group generates charges prior to the photoelectric conversion element of the first pixel group, so as to be transferred to the second floating diffusion region.

A photoplethysmogram (PPG) sensor includes a pixel array that collects light, a pixel sampler that converts the light collected through the pixel array into a plurality of pixel data, an effective area determiner that determines an effective area and a non-effective area of the pixel array based on the pixel data, a power controller that is operable to cut off power to the non-effective area of the pixel array, and a PPG data generator that generates PPG data from pixel data corresponding to the effective area among the pixel data.

A unit pixel circuit includes a first photodiode, a second photodiode different from the first photodiode, a first floating diffusion node in which charges generated in the first photodiode are accumulated, a second floating diffusion node in which charges generated in the second photodiode are accumulated, a capacitor connected to the first floating diffusion node and a first voltage node, and accumulating overflowed charges of the first photodiode, a first switch transistor connecting the first floating diffusion node to a third floating diffusion node, a reset transistor connecting the third floating diffusion node to a second voltage node, a gain control transistor connecting the second floating diffusion node to the third floating diffusion node, and a second switch transistor connected to the first voltage node and the second voltage node.

An image sensing device includes a photoelectric element configured to generate an electric charge in response to light; first and second floating diffusions configured to store the electric charge; a transfer gate having a first end connected to the photoelectric element and a second end connected to the first floating diffusion; a reset transistor configured to reset voltages of the first and second floating diffusions based on a reset signal; a first dual conversion gain (DCG) transistor having a first end connected to the first floating diffusion and a second end connected to the second floating diffusion; first and second pixel circuits configured to generate first and second output voltages based on the first and second floating diffusions; and first and second analog to digital converters configured to receive the first and second output voltages and convert them to first and second digital signals.

A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.