A camera array, an imaging device and/or a method for capturing image that employ a plurality of imagers fabricated on a substrate is provided. Each imager includes a plurality of pixels. The plurality of imagers include a first imager having a first imaging characteristics and a second imager having a second imaging characteristics. The images generated by the plurality of imagers are processed to obtain an enhanced image compared to images captured by the imagers. Each imager may be associated with an optical element fabricated using a wafer level optics (WLO) technology.

A solid state image sensor includes a pixel array, as well as charge-to-voltage converters, reset gates, and amplifiers each shared by a plurality of pixels in the array. The voltage level of the reset gate power supply is set higher than the voltage level of the amplifier power supply. Additionally, charge overflowing from photodetectors in the pixels may be discarded into the charge-to-voltage converters. The image sensor may also include a row scanner configured such that, while scanning a row in the pixel array to read out signals therefrom, the row scanner resets the charge in the photodetectors of the pixels sharing a charge-to-voltage converter with pixels on the readout row. The charge reset is conducted simultaneously with or prior to reading out the signals from the pixels on the readout row.

The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.

A radiographic imaging device includes: a radiation detector including plural pixels, each including a sensor portion and a switching element; a detection unit that detects a radiation irradiation start if an electrical signal caused by charges generated in the sensor portion satisfies a specific irradiation detection condition, and/or if an electrical signal caused by charges generated in a radiation sensor portion that is different from the sensor portion satisfies a specific irradiation detection condition; and a control unit that determines whether or not noise caused by external disturbance has occurred after the detection unit has detected the radiation irradiation start, and if the noise has occurred, that stops a current operation of the radiation detector, and causes the detection unit to perform detection.

The disclosure extends to methods, systems, and computer program products for producing an image in light deficient environments with luminance and chrominance emitted from a controlled light source.

An image processing apparatus (image processing circuit 125) includes a determiner (125a) that determines a weight coefficient which varies depending on a position in each of a plurality of parallax images and an image generator (125b) that synthesizes the plurality of parallax images based on the weight coefficient to generate an image.

A camera module includes a transparent plate, a top sensing layer, and a light-cutting layer. The transparent plate includes a bottom surface and a top surface opposite to the bottom surface. The top sensing layer is formed on the bottom surface. The light-cutting layer is formed on the top surface, and includes a blocking material and transparent apertures penetrating through the blocking material.

To provide a solid-state image sensor in which two or more semiconductor chips are bonded together without voids occurring in their bonding surfaces despite the conductive films bonded together at a high areal ratio. The solid-state image sensor includes at least a first semiconductor chip carrying thereon one or more than one of a first conductor and a pixel array, and a second semiconductor chip which bonds to the first semiconductor chip and carries thereon one or more than one of a second conductor and a logic circuit, with the first semiconductor chip and the second semiconductor chip bonding together in such a way that the first conductor and the second conductor overlap with each other and are electrically connected to each other, and the bonding occurring such that the first conductor and the second conductor differ from each other in the area of their bonding surfaces.

A pixel portion includes photodiodes formed on a semiconductor substrate as photoelectric conversion portions, and includes: a high absorption layer (HA layer) for controlling a reflection component of incident light on one surface side of the photodiodes (photoelectric conversion portions), and re-diffusing the incident light in the photoelectric conversion portions, on one surface side of the photodiodes upon which light is incident; and a diffused light suppression structure for suppressing diffused light (caused by light scattering) in a light incident path toward one surface side of the photoelectric conversion portions including the high absorption layer. Due to this, a solid-state imaging apparatus capable of reducing crosstalk between pixels, achieving miniaturization of pixel size, reducing color mixing, and achieving high sensitivity and high performance can be realized.

An imaging device includes a first pixel including a first photoelectric conversion region disposed in a first substrate and that converts incident light into first electric charges, and a first readout circuit including a first converter that converts the first electric charges into a first logarithmic voltage signal. The first converter includes a first transistor coupled to the first photoelectric conversion region and a second transistor coupled to the first transistor. The imaging device includes a wiring layer on the first substrate and includes a first level of wirings arranged in a first arrangement overlapping the first photoelectric conversion region and in a second arrangement overlapping the first and second transistors, the second arrangement being different than the first arrangement.