A light-detecting device includes a photoelectric conversion film configured to generate a hole as a photoelectric charge and a readout circuit. The readout circuit includes a first node configured to hold the photoelectric charge generated by the photoelectric conversion film and a first P-type metal oxide semiconductor (MOS) transistor connected to the first node and a constant voltage source.

A solid-state imaging device includes a light-receiving surface, a plurality of pixels each including a photoelectric conversion section that photoelectrically converts light incident through the light-receiving surface, and a separation section that electrically and optically separates each photoelectric conversion section. Each of the pixels includes a charge-holding section that holds charges transferred from the photoelectric conversion section, a transfer transistor that includes a vertical gate electrode reaching the photoelectric conversion section, and transfers charges from the photoelectric conversion section to the charge-holding section, and a light-blocking section disposed in a layer between the photoelectric conversion section and the charge-holding section. A plurality of the vertical gate electrodes are electrically coupled together in a plurality of first pixels adjacent to each other among the plurality of pixels.

An imaging device includes a varifocal lens and an imaging sensor which outputs a signal corresponding to light. The imaging sensor includes a photoelectric conversion unit which converts light into an electric charge, electric charge reading regions, transfer control electrodes, a gate control circuit which sequentially applies control signals to the transfer control electrodes to correspond to the position of the focal point of the varifocal lens, and a reading circuit which outputs a signal corresponding to the amount of the electric charge transferred to the electric charge reading regions. The gate control circuit repeats an operation of outputting each of the control signals when the position of the focal point is located in the focal ranges during a frame period.

A selection pixel where signal readout is performed and a reference pixel where signal readout is not performed are arranged in a pixel array section, and an amplification transistor of the selection pixel and an amplification transistor of the reference pixel each source electrode of which is connected in common to a common wire are connected with a constant current source via the common wire to form a differential amplification circuit. Then, a bypass control section which selectively establishes connection between the constant current source and a differential output node of the differential amplification circuit and limits a voltage of the differential output node to a predetermined voltage by causing a bypass current to flow between the constant current source and the differential output node, and a current path for bypass current that supplies the bypass current to the constant current source through the pixel array section are included.

Noise is reduced in a solid-state image capturing element provided with an ADC for each column. An analog-to-digital converter increases or decreases an analog signal using an analog gain selected from among a plurality of analog gains, and converts the increased or decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, one of a test signal having a predetermined level and a pixel signal to the analog-to-digital converter. In a case where a test signal is inputted, a correction value calculation section obtains, from the analog signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section, when inputted with the pixel signal after the correction value is outputted, corrects the digital signal using the correction value.

An imaging device with an arithmetic function in which the circuit size is reduced is provided. The imaging device includes a plurality of pixel blocks. Each of the pixel blocks includes N (N is an integer greater than or equal to 1) first circuits, N second circuits, and a third circuit. Each of the first circuits includes a photoelectric conversion device, and the photoelectric conversion device has a function of converting incident light into an electrical signal and has a function of outputting a first signal that is obtained by binarizing the electrical signal to the second circuit. Each of the second circuits has a function of outputting a second signal that is obtained by multiplying the first signal by a weight coefficient to a third circuit. When the N second signals are output to a wiring electrically connected to the third circuit, addition is performed. The first circuit includes a transistor, and an OS transistor is preferably used as the transistor.

Pixel sensitivity is improved in a solid-state imaging element that performs time delay integration.

The solid-state imaging element includes a plurality of photoelectric conversion elements and a given number of transistors. In the solid-state imaging element, the plurality of photoelectric conversion elements is arranged along a given direction with a given spacing. A size, in the given direction, of each of the plurality of photoelectric conversion elements that are arranged with the given spacing does not exceed the given spacing. Also, in the solid-state imaging element, the given number of transistors are arranged between the plurality of photoelectric conversion elements, and the transistors generate a signal commensurate with as amount of charge generated by any of the plurality of photoelectric conversion elements.

An image sensor includes a first voltage source that supplies a first voltage and a plurality of pixels supplied with the first voltage. The pixel includes a photoelectric conversion unit that photoelectrically converts incident light, an accumulation unit to which an electric charge resulting from photoelectric conversion by the photoelectric conversion unit is transferred and accumulated, a transfer unit that transfers the electric charge from the photoelectric conversion unit to the accumulation unit; a second voltage source that supplies a second voltage, and a supply unit that supplies the transfer unit with a transfer signal based on either the first voltage supplied by the first voltage source or the second voltage supplied by the second voltage source.

An energy harvesting imaging sensor includes an array of pixel structures each formed from a semiconductor having a photodiode overlying a photovoltaic diode. The photodiode and photovoltaic diode are implemented as a vertically stacked P+/N.sub.WELL/P.sub.SUB junction. This structure enables simultaneous imaging and energy harvesting by generating charge in the photodiode that is indicative of light impinging on the photodiode and simultaneously generating charge from the light in the photovoltaic diode located underneath the photodiode.

Technologies relating to CMOS image sensors with integrated Resistive Random-Access Memory (RRAMs) units that provide energy efficient analog storage, ultra-high speed analog storage, and in-memory computing functions are disclosed. An example CMOS image sensor with integrated RRAM crossbar array circuit includes a CMOS image sensor having multiple pixels configured to receive image signals; a column decoder configured to select the pixels in columns to read out; a row decoder configured to select the pixels in rows to read out; an amplifier configured to amplify first signals received from the CMOS image sensor; a multiplexer configured to sequentially or serially read out second signals received from the amplifier; and a first RRAM crossbar array circuit configured to store third signals received from the multiplexer.