A camera array, an imaging device and/or a method for capturing image that employ a plurality of imagers fabricated on a substrate is provided. Each imager includes a plurality of pixels. The plurality of imagers include a first imager having a first imaging characteristics and a second imager having a second imaging characteristics. The images generated by the plurality of imagers are processed to obtain an enhanced image compared to images captured by the imagers. Each imager may be associated with an optical element fabricated using a wafer level optics (WLO) technology.

An image sensor comprises a pixel circuit including a reset transistor and configured to output a pixel signal; and a differential comparator including a pixel input, a reference input, and a comparator output, wherein one of a source or a drain of the reset transistor is connected to the comparator output. In this manner, an active reset method may be incorporated in the image sensor.

A solid-state imaging device comprises a first pixel group includes a first photoelectric conversion unit that converts into electric charges reflection light pulses from an object irradiated with an irradiation light pulse, a first electric charge accumulation unit accumulating the electric charges in synchrony with turning on the irradiation light pulses, and a first reset unit resetting the electric charges; and a second pixel group includes a second photoelectric conversion unit that converts the reflection light into electric charges, a second electric charge accumulation unit that accumulates the electric charges synchronously with a switching the irradiation light pulses from on to off, and a second reset unit that releases a reset of the electric charges converted by the second photoelectric conversion unit.

The invention discloses a pixel acquisition circuit, an image sensor, and an image acquisition system. Therein, the pixel acquisition circuit comprises a photodetection unit, a filter-amplifier unit, a sample and hold unit, and an activation control unit. The photodetection unit is operative to output a first electrical signal corresponding to the light signal illuminating thereon in real time. The filter-amplifier unit has its input terminal coupled with the output terminal of the photodetector, and is operative to perform amplification and filtering out the signal component below a frequency threshold on the first electrical signal, so as to output a second electrical signal. A threshold comparison unit is operative to determine whether the second electrical signal is greater than a first threshold and/or less than a second threshold, and generate an activation instruction signal when the second electrical signal is greater than the first threshold or less than the second threshold. The sample and hold unit has its output terminal coupled with an interface bus. In response to receiving an activation instruction signal, the activation control unit instructs the sample and hold unit to acquire and buffer the first electrical signal, and sends a transmission request to the interface bus.

Noise is reduced in a solid-state image capturing element provided with an ADC for each column. An analog-to-digital converter increases or decreases an analog signal using an analog gain selected from among a plurality of analog gains, and converts the increased or decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, one of a test signal having a predetermined level and a pixel signal to the analog-to-digital converter. In a case where a test signal is inputted, a correction value calculation section obtains, from the analog signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section, when inputted with the pixel signal after the correction value is outputted, corrects the digital signal using the correction value.

An image sensing device includes a first test block, a second test block, and a readout block. The first test block includes a plurality of first image sensing pixels structured to convert incident light carrying an image into a first pixel signal indicative of the image, and a first heating element structured to transmit heat to the first image sensing pixels. The second test block includes a plurality of second image sensing pixels that each include a light blocking structure to be shielded from receiving incident light to generate a second pixel signal without being directly exposed to the incident light, and a second heating element structured to transmit heat to the second image sensing pixels. The readout block processes the first pixel signal output from the first test block and the second pixel signal output from the second test block.

A solid-state imaging device includes: pixels disposed in a matrix of pixel rows and pixel columns; control wires provided for the pixel rows or the pixel columns, and each connected to at least two pixels out of the pixels, the at least two pixels being included in one of the pixel rows or the pixel columns for which the control wire is provided; drive circuits that are provided for the control wires, each include buffer elements in at least two stages, and each output a control signal to one of the control wires for which the drive circuit is provided, the buffer elements in the at least two stages being connected in series; and a first wire that short-circuits output wires of the buffer elements in one of the at least two stages in at least two of the plurality of drive circuits.

A photoelectric conversion device including a plurality of substrates in a stacked state, the plurality of substrates including a first substrate and a second substrate electrically connected to each other, the photoelectric conversion device comprising: a memory cell unit including row-selection lines that are to be driven upon selection of a row of a memory cell array and column-selection lines that are to be driven upon selection of a column of the memory cell array; and a memory peripheral circuit unit that includes row-selection line connection portions and column-selection line connection portions so as to drive the row-selection lines and to drive the column-selection lines, wherein a first portion that is at least a part of the memory peripheral circuit unit is formed on the first substrate and the memory cell unit is formed on the second substrate.

An image sensor may include: a pixel array including a plurality of pixels; and a timing controller configured to control the pixel array according to an operation mode of the pixel array. The operation mode may be any one of a first mode in which the plurality of pixels operate according to a global shutter method and a second mode in which the plurality of pixels operate according to a dual conversion gain method.

Techniques, systems, architectures, and methods for reducing peak power during an Analog-to-Digital Conversion (ADC) process, in embodiments on a Focal Plane Array (FPA).