Systems and methods of the present disclosure provide for dynamic delay equalization of related media signals in a media transport system. Methods include receiving a plurality of related media signals, transporting the related media signals along different media paths, calculating uncorrected propagation delays for the media paths, and delaying each of the related media signals by an amount related to the difference between the longest propagation delay (of the uncorrected propagation delays) and the uncorrected propagation delay of the related media signal/media path. Calculating the uncorrected propagation delays and delaying the related media signals may be performed in response to a change to the propagation delay of at least one of the related media signals/media paths. Additionally or alternatively, calculating the uncorrected propagation delays and delaying the related media signals may be performed while transporting the related media signals.

Novel tools and techniques are provided for implementing media content streaming or playback, and, more particularly, for implementing media stream synchronization. In some embodiments, a synchronization system might receive a first signal that is output from a first device, which receives an original video signal from a video source and outputs a first video signal. The synchronization system might analyze the first signal to determine a first frame buffer delay, generate a delay adjustment signal based on such determination, and send the delay adjustment signal to a frame buffer delay device. The frame buffer delay device and the first device might concurrently receive the original video signal from the video source. The first delay adjustment signal causes the frame buffer delay device to apply the first frame buffer delay to the original video signal to produce a second video signal that is synchronized with the first video signal.

A system, article, and method of rendering late or early audio-video frames.

A synchronized video stream switching method for a video wall system. The video wall system includes a transmitter having first and second channels, and a receiver having third and fourth channels. The method includes: (a) After receiving a control command, the transmitter uses the first channel to transmit the first video stream to the third channel, and uses the second channel to transmit a pre-switch command to the fourth channel. (b) After receiving the pre-switch command, the receiver preserves the first video stream in the third channel. (c) After the switching event occurs at the transmitter in response to the control command, the transmitter transmit the second video stream via the first channel, but the receiver continues to preserve the first video stream in the third channel within a predetermined time period. (d) After the predetermined time period, the receiver accepts the second video stream in the third channel.

A measurement method for measuring video latency induced by a piece of video playback equipment that is connected to a piece of decoder equipment having a photosensitive sensor incorporated therein, the method including the steps of: causing a screen of the video playback equipment to generate emitted light test signals; using the photosensitive sensor to acquire captured light signals including received light test signals resulting from the emitted light test signals being reflected on at least one surface of surroundings of the video playback equipment; acquiring measurement signals produced by the photosensitive sensor from the captured light signals, and analyzing the measurement signals in order to obtain a video latency measurement.

Method, system, and program product for measuring audio video synchronization. This is done by first acquiring audio video information into an audio video synchronization system. The step of data acquisition is followed by analyzing the audio information, and analyzing the video information. Next, the audio information is analyzed to locate the presence of sounds therein related to a speaker's personal voice characteristics. In Analysis Phase Audio and Video MuEv-s are calculated from the audio and video information, and the audio and video information is classified into vowel sounds including AA, EE, OO, B, V, TH, F, silence, other sounds, and unclassified phonemes. The inner space between the lips are also identified and determined. This information is used to determine and associate a dominant audio class in a video frame. Matching locations are determined, and the offset of video and audio is determined.

Systems and methods of the present disclosure provide for dynamic delay equalization of related media signals in a media transport system. Methods include receiving a plurality of related media signals, transporting the related media signals along different media paths, calculating uncorrected propagation delays for the media paths, and delaying each of the related media signals by an amount related to the difference between the longest propagation delay (of the uncorrected propagation delays) and the uncorrected propagation delay of the related media signal/media path. Calculating the uncorrected propagation delays and delaying the related media signals may be performed in response to a change to the propagation delay of at least one of the related media signals/media paths. Additionally or alternatively, calculating the uncorrected propagation delays and delaying the related media signals may be performed while transporting the related media signals.

Novel tools and techniques are provided for implementing media content streaming or playback, and, more particularly, for implementing media stream synchronization. In some embodiments, a synchronization system might receive a first signal that is output from a first device, which receives an original video signal from a video source and outputs a first video signal. The synchronization system might analyze the first signal to determine a first frame buffer delay, generate a delay adjustment signal based on such determination, and send the delay adjustment signal to a frame buffer delay device. The frame buffer delay device and the first device might concurrently receive the original video signal from the video source. The first delay adjustment signal causes the frame buffer delay device to apply the first frame buffer delay to the original video signal to produce a second video signal that is synchronized with the first video signal.

Disclosed are a controlling device and method for frequency synchronization as well as a LCD TV. The method is applied to an LCD TV, wherein the LCD TV includes a front-end motherboard chip, a main drive control chip and a plurality of column drive control chips, the method includes: when the main drive control chip recognizes that its operating frequency is unstable, it generates a clock turn-off signal; the main drive control chip transmits fixed data to each column drive control chip according to the clock turn-off signal and receives a clock training request initiated by each column drive control chip according to the fixed data; and when recognizing that the operating frequency synchronizes with a frequency corresponding to front-end data transmitted by the front-end motherboard chip, the main drive control chip responds to the clock training request and transmits clock training data to each column drive control chip.

Disclosed are a controlling device and method for frequency synchronization as well as a LCD TV. The method is applied to an LCD TV, wherein the LCD TV includes a front-end motherboard chip, a main drive control chip and a plurality of column drive control chips, the method includes: when the main drive control chip recognizes that its operating frequency is unstable, it generates a clock turn-off signal; the main drive control chip transmits fixed data to each column drive control chip according to the clock turn-off signal and receives a clock training request initiated by each column drive control chip according to the fixed data; and when recognizing that the operating frequency synchronizes with a frequency corresponding to front-end data transmitted by the front-end motherboard chip, the main drive control chip responds to the clock training request and transmits clock training data to each column drive control chip.