The present application discloses an identification circuit for a power-line carrier signal. During signal transmission on a power line, the amplitude change and duration of a voltage signal on the power line are identified and then decoded into corresponding data, so as to reduce dependency on a power supply voltage during signal identification, and prevent the signal identification rate from decreasing as a result of an increase in the transmission distance, thereby reducing requirements for a system power supply.

The present application discloses an identification circuit for a power-line carrier signal. During signal transmission on a power line, the amplitude change and duration of a voltage signal on the power line are identified and then decoded into corresponding data, so as to reduce dependency on a power supply voltage during signal identification, and prevent the signal identification rate from decreasing as a result of an increase in the transmission distance, thereby reducing requirements for a system power supply.

The invention relates to a power factor correction (PFC) circuit (20), comprising an inductor (21) which is configured to provide a discharge current, a capacitor (23) which is connected to the inductor (21) via a switch (24) and which can be charged with said discharge current, a control unit (14) which is configured to alternately switch the switch (24) on and off based on a feedback control, wherein the control unit (14) has an input interface (42) for receiving a feedback signal (ZXCS) which represents a discharge voltage of the inductor (21), wherein the control unit (14), in a DCM mode, is further configured to calculate a switch on time (T.sub.on) of the switch (24) which is after a first local minimum of the discharge voltage, and wherein, after switching off the switch (24), the control unit is configured to: either switch on the switch (24) at a next or closest local minimum of the inductor voltage after Ton, in case Ton is less than a directly or indirectly set reference time (T.sub.ref), or close the switch (24) at T.sub.on, in case T.sub.on is equal to or exceeds T.sub.ref.

The invention relates to a power factor correction (PFC) circuit (20), comprising an inductor (21) which is configured to provide a discharge current, a capacitor (23) which is connected to the inductor (21) via a switch (24) and which can be charged with said discharge current, a control unit (14) which is configured to alternately switch the switch (24) on and off based on a feedback control, wherein the control unit (14) has an input interface (42) for receiving a feedback signal (ZXCS) which represents a discharge voltage of the inductor (21), wherein the control unit (14), in a DCM mode, is further configured to calculate a switch on time (T.sub.on) of the switch (24) which is after a first local minimum of the discharge voltage, and wherein, after switching off the switch (24), the control unit is configured to: either switch on the switch (24) at a next or closest local minimum of the inductor voltage after Ton, in case Ton is less than a directly or indirectly set reference time (T.sub.ref), or close the switch (24) at T.sub.on, in case T.sub.on is equal to or exceeds T.sub.ref.

An integrated multi-layered lighting system includes a first board having a first component area and a first light area, a second board coupled to and offset from the first board, the second board having a first opening overlapping the first light area of the first board in a plan view, and a second component area overlapping the first component area of the first board in a plan view, a plurality of light emitting diodes (LEDs) coupled to the first board and positioned in the first light area corresponding to the first opening of the second board, and a light driver configured to drive the plurality of LEDs and including a plurality of first components coupled to the first board and positioned in the first component area and a plurality of second components coupled to the second board and positioned in the second component area.

An integrated multi-layered lighting system includes a first board having a first component area and a first light area, a second board coupled to and offset from the first board, the second board having a first opening overlapping the first light area of the first board in a plan view, and a second component area overlapping the first component area of the first board in a plan view, a plurality of light emitting diodes (LEDs) coupled to the first board and positioned in the first light area corresponding to the first opening of the second board, and a light driver configured to drive the plurality of LEDs and including a plurality of first components coupled to the first board and positioned in the first component area and a plurality of second components coupled to the second board and positioned in the second component area.

An active gain control circuit includes a dynamic voltage divider having a variable resistance configured to attenuate a rectified input line voltage to produce a reference signal, a filter-divider circuit configured to extract a DC-level attenuated reference voltage from the reference signal, and an operational amplifier configured to receive the DC-level attenuated reference voltage and a regulation voltage, and to generate a gate control signal based on a difference between the regulation voltage and the DC-level attenuated reference voltage, the variable resistance of the dynamic voltage divider being controlled by the gate control signal, and a comparison voltage generator configured to attenuate a comparison voltage to generate the regulation voltage.

An active gain control circuit includes a dynamic voltage divider having a variable resistance configured to attenuate a rectified input line voltage to produce a reference signal, a filter-divider circuit configured to extract a DC-level attenuated reference voltage from the reference signal, and an operational amplifier configured to receive the DC-level attenuated reference voltage and a regulation voltage, and to generate a gate control signal based on a difference between the regulation voltage and the DC-level attenuated reference voltage, the variable resistance of the dynamic voltage divider being controlled by the gate control signal, and a comparison voltage generator configured to attenuate a comparison voltage to generate the regulation voltage.

An integrated single stage ac-dc driver for powering LED loads includes a boost converter operating in a Discontinuous Conduction Mode, DCM, comprising a half-bridge, and a Zeta Asymmetrical Half Bridge, ZAHB, integrated with the boost converter such that the boost converter and the ZAHB share the half-bridge to perform power factor control, PFC, with a fixed duty cycle and control an output voltage.

An integrated single stage ac-dc driver for powering LED loads includes a boost converter operating in a Discontinuous Conduction Mode, DCM, comprising a half-bridge, and a Zeta Asymmetrical Half Bridge, ZAHB, integrated with the boost converter such that the boost converter and the ZAHB share the half-bridge to perform power factor control, PFC, with a fixed duty cycle and control an output voltage.