A multilayer board includes thermoplastic resin layers laminated together, a first-class conductor pattern including a conductor foil on a first surface of one of the thermoplastic resin layers, a second-class conductor pattern in contact with a second surface of the one of the thermoplastic resin layers, and an interlayer connection conductor in the one of the thermoplastic resin layers and including a first end surface connected to the first-class conductor pattern and a second end surface connected to a second-class conductor pattern. The second-class conductor pattern and the first interlayer connection conductor include a conductor of a single material including a resin, or a conductor of a single material including a metal with a melting point lower than that of the conductor foil.

An electronic component includes: an ESD discharge member including a substrate having first and second surfaces opposing each other, first and second through-holes penetrating through the substrate, and first and second conductors; and a multilayer capacitor disposed on the first surface of the substrate, in which the multilayer capacitor may include: a capacitor body; and first and second external electrodes disposed outside the capacitor body and connected to the first and second conductors, respectively, and the first and second conductors may include first and second via electrodes coated on inner walls of the first and second through-holes, respectively.

A chip part is provided that includes a substrate in which an element region and an electrode region are set, an insulating film (a first insulating film and a second insulating film) which is formed on the substrate and which selectively includes an internal concave/convex structure in the electrode region on a surface, a first connection electrode and a second connection electrode which include, at a bottom portion, an anchor portion entering the concave portion of the internal concave/convex structure and which include an external concave/convex structure on a surface on the opposite side and a circuit element which is disposed in the element region and which is electrically connected to the first connection electrode and the second connection electrode.

A method of making an electronic device may include forming at least one circuit layer that includes solder pads on a substrate and forming at least one liquid crystal polymer (LCP) solder mask having mask openings therein. The method may also include forming at least one thin film resistor on the LCP solder mask and coupling the at least one LCP solder mask to the substrate so that the at least one thin film resistor is coupled to the at least one circuit layer and so that the solder pads are aligned with the mask openings.

A surface mountable coupler may include a monolithic base substrate having a first surface, a second surface, a length in an X-direction, and a width in a Y-direction that is perpendicular to the X-direction. A plurality of ports may be formed over the first surface of the monolithic base substrate including a coupling port, an input port, and an output port. The coupler may include a first thin film inductor and a second thin film inductor that is inductively coupled with the first thin film inductor and electrically connected between the input and output ports. A thin film circuit may electrically connect the first thin film inductor with the coupling port. The thin film circuit may include at least one thin film component.

The present disclosure provides an electronic device including a substrate, an extending element, a conductive element and a first insulating layer. The substrate includes an edge. The extending element is disposed on the substrate and includes a first conductive layer and a semiconductor layer, the first conductive layer and the semiconductor layer are overlapped, and the semiconductor layer extends to the edge of the substrate. The conductive element is overlapped with the first conductive layer. The insulating layer is disposed between the conductive element and the extending element.

A leadwire for physiological patient monitoring is provided that transfers potentials received at a chest electrode to a data acquisition device. The leadwire includes an electrode end connectable to the chest electrode and a first conductive layer extending from the electrode end. The leadwire also has a device end connectable to a data acquisition device and a second conductive layer extending from the device end. The first conductive layer is galvanically isolated from the second conductive layer such that the first conductive layer and the second conductive layer form a capacitor.

A device source wafer includes a wafer substrate, devices formed on or in the wafer substrate at a location on the wafer substrate, and test structures disposed on the wafer substrate connected to some but not all of the devices. The devices include a first device disposed at a first location and a second device disposed at a second different location on the wafer substrate. The test structures include at least a first test structure connected to the first device and a second test structure connected to the second device. The first test structure is adapted to measuring a characteristic of the first device and the second test structure is adapted to measuring the characteristic of the second device. An estimated characteristic of unmeasured devices is derived from the first and second device locations and measured characteristics and the device is selected based on the estimated characteristic.

A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.

The present invention provides a conductive fabric comprising base cloth and a conductive metallic circuit structure formed on the surface of the base cloth. The conductive metallic circuit structure comprises at least one metallic seed layer and at least one chemical-plating layer. The metallic seed layer is an evaporation-deposition layer or a sputter-deposition layer and has a circuit pattern. The chemical-plating layer is applied over the surface of the metallic seed layer. The conductive fabric has improved conductivity and heat generation efficiency.