A method includes forming one or more vias in a first layer, forming one or more vias in at least a second layer different than the first layer, aligning at least a first via in the first layer with at least a second via in the second layer, and bonding the first layer to the second layer by filling the first via and the second via with solder material using injection molded soldering.

A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.

A circuit board heat sink structure having a circuit board and comprising a metallic heat sink, wherein the circuit board has a metal substrate, an insulation layer and a conductor layer, and the wherein the circuit board is arranged on the heat sink in such a way that the metal substrate contacts a locating face of the heat sink. At least one heat transition point is formed between the heat sink and the metal substrate, which provides a defined metallic contact between the material of the heat sink and the material of the metal substrate. A method is also provided for forming the circuit board heat sink structure.

A semiconductor device including a semiconductor chip disposed on a substrate having a conductive pattern, an insulating plate and a metal plate that are sequentially formed and respectively have the thicknesses of T2, T1 and T3. The metal plate has a plurality of depressions formed on a rear surface thereof. In a side view, a first edge face, which is an edge face of the conductive pattern, is at a first distance away from a second edge face that is an edge face of the metal plate, and a third edge face, which is an edge face of the semiconductor chip, is at a second distance away from the second edge face. Each depression is located within a depression formation distance from the first edge face, where: 0<depression formation distance≤(0.9×T1.sup.2/first distance), and/or (1.1×T1.sup.2/first distance)≤depression formation distance<second distance.

A wiring substrate includes a first insulating layer, a first conductor layer, and a plurality of filled vias. The first insulating layer has a first surface and a second surface positioned on a side opposite to the first surface. The first conductor layer is formed on the first surface of the first insulating layer. The plurality of filled vias are formed inside the first insulating layer. The plurality of filled vias each have a structure in which a via hole penetrating the first insulating layer is filled with a metal. The first conductor layer includes a pad. The pad overlaps the plurality of filled vias in a plan view from a thickness direction of the first insulating layer and is connected to the plurality of filled vias.

An electronic device with high density for component arrangement includes a first substrate, a second substrate, a plural of passages formed through the first and the second substrates, a first contact arranged on the first face of the first substrate to conceal the corresponding one of the passages, a second contact arranged on the second substrate and adjacent to the corresponding one of the passages, and a conductor disposed in the passages. A first end of the conductor electrically connects the first contact, while a second end of the conductor electrically connects the second contact.

There is provided an apparatus comprising: a base substrate and a component substrate having at least two electronic components arranged thereon. At least one aperture is formed through an entire thickness of the component substrate. The at least one aperture is formed in an interspace between the at least two electronic components. The component substrate is coupled to the base substrate using a solder joint. Each of the at least two electronic components may comprise a light emitting diode element. A method of manufacturing an apparatus is also disclosed.

Embodiments of the present invention provide a method (1000) of assembling an electrical circuit comprising one or more copper electrical conductors, the method comprising plating (1010) a surface of the one or more conductors with a layer comprising tin; annealing the plating; applying (1020) solder to at least a portion of the one or more electrical conductors, wherein said solder comprises tin and copper; and annealing the electrical circuit.

A method for forming a functional part in a minute space includes the steps of: filling a minute space with a dispersion functional material in which a thermally-meltable functional powder is dispersed in a liquid dispersion medium; evaporating the liquid dispersion medium present in the minute space; and heating the functional powder and hardening it under pressure.

An electronic device may be provided with printed circuits. Electrical components may be interconnected using signal paths formed from metal traces in the printed circuits. The printed circuits may include flexible printed circuits with bent configurations. The flexible printed circuits may be provided with integral bend retention structures. A bend retention structure may be formed from a polymer layer, a solder layer, a stiffener formed from metal or polymer that is attached to flexible printed circuit layers with adhesive, a conformal plastic coating that covers exposed metal traces at a bend, a metal stiffener with screw holes, a shape memory alloy, a portion of a flexible printed circuit dielectric substrate layer with a reduced elongation at yield value, or combinations of these structures. The bend retention structure maintains a bend in a bent flexible printed circuit.