An etchant composition for etching a triple layer metal wiring structure of molybdenum/copper/molybdenum or molybdenum alloy/copper/molybdenum alloy, and a use thereof are disclosed. The etchant composition includes hydrogen peroxide, glycol, an etching inhibitor, a chelating agent, an etching additive, a pH adjuster, and water, The etchant can not only slow down the decomposition of hydrogen peroxide, but also extend the lifespan of the etchant, thereby greatly reducing the costs of the etchant in the manufacturing process, and improving the safety factor of the etchant.

An extremely thin copper foil is provided that enables formation of highly fine different wiring patterns with a line/space (L/S) of 10 μm or less/10 μm or less on two sides of the copper foil and is thus usable as an inexpensive and readily processable substitution for silicon and glass interposers. The extremely thin copper foil includes, in sequence, a first extremely thin copper layer, an etching stopper layer, and the second extremely thin copper layer. Two sides of the extremely thin copper foil each have an arithmetic average roughness Ra of 20 nm or less.

A circuit board according to an embodiment includes an insulating layer; a first circuit pattern disposed on a first surface of the insulating layer; a first solder resist disposed on the first surface of the insulating layer; and a first barrier layer including a first-first portion disposed between the first solder resist and the first circuit pattern, and a first-second portion disposed between the insulating layer and the first circuit pattern; wherein the firs-first portion of the first barrier layer includes: a first-first gold (Au) layer disposed under a lower surface of the first circuit pattern; and a first-first palladium (Pd) layer disposed under a lower surface of the first-first gold (Au) layer; wherein the first-second portion of the first barrier layer includes: a first-second gold (Au) layer disposed to surround a side surface and an upper surface of the first circuit pattern; and a first-second palladium (Pd) layer disposed to surround the first-second gold (Au) layer; and wherein the first circuit pattern is not in contact with the first solder resist and the insulating layer by the first-first portion and the first-second portion of the first barrier layer.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and having a conductor pad, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and has an opening exposing the conductor pad in the conductor layer, and a bump formed on the conductor pad of the conductor layer and including a base plating layer formed in the opening of the solder resist layer, an intermediate layer formed on the base plating layer, and a top plating layer formed on the intermediate layer such that that the base plating layer has a side surface exposed from the solder resist layer and that the intermediate layer has a side surface protruding from the side surface of the base plating layer.

An extremely thin copper foil is provided that enables formation of highly fine different wiring patterns with a line/space (L/S) of 10 μm or less/10 μm or less on two sides of the copper foil and is thus usable as an inexpensive and readily processable substitution for silicon and glass interposers. The extremely thin copper foil includes, in sequence, a first extremely thin copper layer, an etching stopper layer, and the second extremely thin copper layer. Two sides of the extremely thin copper foil each have an arithmetic average roughness Ra of 20 nm or less.

According to the present invention, a base material for a printed circuit board includes: an insulating base film; and a metal layer that is layered on at least one surface of the base film and that includes copper as a main component, wherein in a content per unit area in a region of 100 nm or less from an interface of the metal layer with the base film, Cr<0.1 mg/m.sup.2, and Ni<0.1 mg/m.sup.2, wherein an arithmetic mean roughness (Sa) of the surface of the base film on which the metal layer is layered is less than 0.10 μm.

A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer and having a conductor pad, a solder resist layer formed on the base insulating layer such that the solder resist layer is covering the conductor layer and has an opening exposing the conductor pad in the conductor layer, and a bump formed on the conductor pad of the conductor layer and including a base plating layer formed in the opening of the solder resist layer, an intermediate layer formed on the base plating layer, and a top plating layer formed on the intermediate layer such that that the base plating layer has a side surface exposed from the solder resist layer and that the intermediate layer has a side surface protruding from the side surface of the base plating layer.

A method includes preparing a circuit board that includes a first metal pattern over a first face side of the substrate, a first electrode in a periphery of the first metal pattern, a second electrode over a second face side of the substrate, and a second metal pattern thermally connected to the first metal pattern and in which an electronic device is fixed on the first metal pattern and an electronic component is electrically connected to the second electrode, and connecting the first electrode and a third electrode of the electronic device by a bonding wire with the electronic device being heated. By a board support stage, the electronic device is heated by transferring heat to the electronic device via the second and then first metal pattern with the circuit board being supported to form a space including the electronic component between the second face and the board support stage.

According to the present invention, a base material for a printed circuit board includes: an insulating base film; and a metal layer that is layered on at least one surface of the base film and that includes copper as a main component, wherein in a content per unit area in a region of 100 nm or less from an interface of the metal layer with the base film, Cr<0.1 mg/m.sup.2, and Ni<0.1 mg/m.sup.2, wherein an arithmetic mean roughness (Sa) of the surface of the base film on which the metal layer is layered is less than 0.10 m.

A conductor structure includes a first metal layer, a second metal layer, and a controlling layer. The second metal layer is disposed on the first metal layer. A material of the first metal layer and a material of the second metal layer include at least one identical metal element. The controlling layer is disposed between the first metal layer and the second metal layer. A thickness of the controlling layer is less than a thickness of the first metal layer, and the thickness of the controlling layer is less than a thickness of the second metal layer.