A capacitor device to store electrical charge is disclosed that includes a first unit of a first conductor layer fabricated from a first material. The first conductor layer is sandwiched between two dielectric layers. This assembly is layered on a second unit of a second conductor layer fabricated from a second material and sandwiched between two additional dielectric layers. The first conductor layers are all electrically connected to one another, and the second conductor layers being electrically connected to one another but are not electrically connected to the first conductor. Any multiple of first and second units may be utilized.

A method for manufacturing a circuit board with narrow conductive traces and narrow spaces between traces includes a base layer and two first wiring layers disposed on opposite surfaces of the base layer. Each first wiring layer includes a first bottom wiring and a first electroplated copper wiring. The first bottom wiring is formed on the base layer. The first bottom wiring includes a first end facing the base layer, a second end opposite to the first end, and a first sidewall connecting the first end and the second end. The first electroplated copper wiring covers the second end and the first sidewall of the first bottom wiring.

When a laminate of a plurality of different materials including a metal plate is bonded in a pressurized and heated state, a first pressurizing member in which a first metal foil/a carbon sheet or a ceramic sheet/a graphite sheet are laminated in this order is arranged so that the first metal foil is in contact with a surface of the first metal plate of the laminate, the first metal foil is made of a material that does not react at a contact surface of the first plate member and the first metal foil when heating, and a product of a Young's modulus (GPa) and a thickness (mm) of the first metal foil is 0.6 or more and 100 or less, so that a good bonded body can be manufactured by evenly pressurizing the laminate and foreign substances can be restrained from adhering to the surface of the laminate.

A multilayer board includes a flexible substrate including insulating layers stacked and a pair of through-holes penetrating the insulating layers, and an interlayer connecting conductor in an opposing region in which the pair of through-holes opposes each other in a plan view of the insulating layers viewed from a stacking direction. A cross section of the flexible substrate taken in a lateral direction passing through the pair of through-holes and the interlayer connecting conductor and the stacking direction has a U or S shape. In the cross section, a curvature radius of an inner region located between the pair of through-holes is larger than a curvature radius of an outer region adjacent to the pair of through-holes on an outer side thereof.

A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer.

A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.

A method for manufacturing a circuit board with narrow conductive traces and narrow spaces between traces includes a base layer and two first wiring layers disposed on opposite surfaces of the base layer. Each first wiring layer includes a first bottom wiring and a first electroplated copper wiring. The first bottom wiring is formed on the base layer. The first bottom wiring includes a first end facing the base layer, a second end opposite to the first end, and a first sidewall connecting the first end and the second end. The first electroplated copper wiring covers the second end and the first sidewall of the first bottom wiring.

Examples are disclosed that relate to magnetically aligned switching circuits. One disclosed example provides an electronic component comprising a first terminal, a second terminal, and a deformable host material arranged between the first terminal and the second terminal. Aligned magnetically within the host material is an ensemble of particles each comprising a ferromagnetic material, each particle having greater electrical conductivity than the host material. The ensemble of particles is configured to form at least one complete conduction path from the first terminal to the second terminal.

A method of forming a high-conductivity electrical interconnect on a substrate may include forming a graphene film with a plurality of graphene members, depositing a metal over the graphene film, and providing a metallic overlay that connects the plurality of graphene members together through the depositing operation to form a covered graphene film.

An electronic device, a method and apparatus for producing an electronic device, and a composition therefor are disclosed. An adhesive material is applied in a first pattern on a surface of a receiver substrate. A carrier having a metal foil disposed thereon is brought into contact with the first substrate such that a portion of the metal foil contacts the adhesive material. The adhesive material includes a first polymer, a second polymer, and a conductive carbon black dispersion, and is activated using at least one of mechanical pressure and heat while the portion of the metal foil is in contact with the adhesive material. The first substrate and the second substrate are separated, whereby the portion of the metal foil is transferred to the first substrate. The adhesive is electrically conductive to maximize the possibility of maintaining electrical connectivity even when there is a break in the metal foil.