A display device includes a display substrate having a fan-out area, and a plurality of driving integrated circuits are arranged to reduce a signal delay variation. A printed circuit board (PCB) is connected to the fan-out area, and a driving integrated circuit (IC) is disposed on the PCB in a second direction. A first circuit board wiring is disposed on the PCB and connected to the driving IC. A second circuit board wiring is disposed in the second direction and connected to the driving IC. A first fan-out wiring is disposed on the fan-out area and connected to the first circuit board wiring, and a second fan-out wiring is disposed in the second direction from the fan-out area and connected to the second circuit board wiring. A sum of the length of the wiring of the first circuit board and the second circuit board may be substantially the same.

One embodiment provides a printed circuit board (PCB). The PCB can include one or more metal layers and at least a pair of differential transmission lines. The pair of differential transmission lines can include a first transmission line and a second transmission line. The first transmission line can include a plurality of timing-skew-compensation structures, and a respective timing-skew-compensation structure of the first transmission line or a corresponding segment of the second transmission line adjacent to the timing-skew-compensation structure has a non-uniform width.

A printed circuit board and a power copper surface configuration method are provided. The method includes the following steps: configuring a first power supply component, a second power supply component, a power sink component, a convergence copper surface portion, a first grounding copper surface portion and a second grounding copper surface portion; determining whether currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion; when the currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion, determining whether the convergence copper surface portion conforms to a current balancing design of the printed circuit board according to at least one of first and second tolerable difference values and an average current. When the convergence copper surface portion conforms to the current balancing design, the method is ended.

An electronic device is provided and includes a first voltage trace, a second voltage trace, a first region electrode, a second region electrode, and a voltage source module. The second voltage trace is electrically insulated from the first voltage trace, the first region electrode is electrically connected to the first voltage trace, and the second region electrode is electrically connected to the second voltage trace. The voltage source module provides a first driving voltage to the first voltage trace and provides a second driving voltage to the second voltage trace, in which the first driving voltage is different from the second driving voltage.

A printed circuit board and a power copper surface configuration method are provided. The method includes the following steps: configuring a first power supply component, a second power supply component, a power sink component, a convergence copper surface portion, a first grounding copper surface portion and a second grounding copper surface portion; determining whether currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion; when the currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion, determining whether the convergence copper surface portion conforms to a current balancing design of the printed circuit board according to at least one of first and second tolerable difference values and an average current. When the convergence copper surface portion conforms to the current balancing design, the method is ended.

Disclosed is an electronic device having a display region and a peripheral region adjacent to the display region. The electronic device includes a first electrode disposed in the display region, a second electrode disposed in the display region, a circuit module disposed in the peripheral region, a first electrical trace, and a second electrical trace electrically insulated from the first electrical trace. The circuit module is electrically connected to the first electrode through the first electrical trace and provides a first driving voltage to the first electrical trace. The circuit module is electrically connected to the second electrode through the second electrical trace and provides a second driving voltage to the second electrical trace, and the first driving voltage is different from the second driving voltage. In a top view, the first electrical trace at least partially overlaps the second electrical trace.

A display device includes a display substrate having a fan-out area, and a plurality of driving integrated circuits are arranged to reduce a signal delay variation. A printed circuit board (PCB) is connected to the fan-out area, and a driving integrated circuit (IC) is disposed on the PCB in a second direction. A first circuit board wiring is disposed on the PCB and connected to the driving IC. A second circuit board wiring is disposed in the second direction and connected to the driving IC. A first fan-out wiring is disposed on the fan-out area and connected to the first circuit board wiring, and a second fan-out wiring is disposed in the second direction from the fan-out area and connected to the second circuit board wiring. A sum of the length of the wiring of the first circuit board and the second circuit board may be substantially the same.

A method for manufacturing an array substrate includes a step of forming a first metal layer on a glass substrate such that the first metal layer includes multiple first metal lines distributed as a fan shape, each of the first metal lines including a predetermined number of first metal strip portions that are spaced from each other and have an equal length; forming an insulation layer on the multiple first metal lines in such a way that portions of the insulation layer respectively covering the first metal strip portions are each provided with a first through hole and a second through hole formed therein; and forming a second metal layer on the insulation layer such that the second metal layer includes multiple second metal strip portions respectively in contact with the first metal strip portions of the first metal lines via the first through holes and the second through holes.

The present invention relates to a microwave signal transition component (1) having a first signal conductor side (2) and a second signal conductor side (3). The signal transition component (1) is arranged for transfer of microwave signals from the first signal conductor side (2) to the second signal conductor side (3). The transfer component (1) comprises at least one, at least partly circumferentially running, electrically conducting frame (4), a dielectric filling (5) positioned at least partly within said conducting frame (4), at least one filling aperture (6; 6a, 6b) miming through the dielectric filling, and, for each filling aperture (6; 6a, 6b), an electrically conducting connection (7; 7a, 7b) that at least partly is positioned within said filling aperture (6; 6a, 6b). The present invention also relates to a method for manufacturing a microwave signal transition component according to the above.

The systems and methods described herein relate to an adapter driver board for parallel operation of power modules. The systems and methods receive an electrical signal at an input interface of a high voltage adapter board. The systems and methods further deliver the electrical signals to first and second switches along corresponding first and second conductive traces. The first conductive trace extends along the high voltage adapter board and is conductively coupled to the input interface and the first switch. The second conductive trace extending along the high voltage adapter board and is conductively coupled to the input interface and the second switch. The first and second conductive traces are each configured to have an inductance substantially the same. The systems and methods synchronously activate the first and second switches based on the electrical signal.