A wiring circuit board includes a porous insulating layer, and a first conductive layer sequentially toward one side in the thickness direction. The first conductive layer includes a first signal wire and first ground wires. Each of the first ground wires is thicker than the first signal wire.

A wiring substrate includes an insulating layer including resin and filler particles, conductor layers including an upper-layer conductor layer and a lower-layer conductor layer such that the insulating layer is sandwiched between the upper-layer and lower-layer conductor layers, and a penetrating conductor formed in the insulating layer such that the penetrating conductor is penetrating through the insulating layer and connecting the upper-layer and lower-layer conductor layers. The penetrating conductor is formed such that the penetrating conductor has a first length which is the maximum width of the penetrating conductor in the direction orthogonal to the thickness direction of the wiring substrate and the first length is 25 μm or less, and the insulating layer is formed such that the maximum particle size of the filler particles in a region within the distance of 40% of the first length from the penetrating conductor is 20% or less of the first length.

A glass wiring board that can be kept from cracking by better preventing concentration of stresses in a glass plate on which a conductor layer including an electrolytic copper plating layer is provided, the wiring board includes: a glass plate; a first metal layer covering at least a part of the glass plate; and a second metal layer covering at least a part of the first metal layer, and the area of the first metal layer in contact with the second metal layer is smaller than the area of the second metal layer facing the first metal layer.

A method for designing PCB pads: using a drill bit of a first size to drill through a PCB from a first side; using a drill bit of a second size to back-drill a second side of the PCB so as to form a pyramid-shaped through hole; setting the connection means of a second layer and third layer of an inner layer of the PCB that comprises the pyramid-shaped through hole to full connection; and disposing a pad of a third size on a first layer of the inner layer, and disposing a pad of a fourth size on the last layer of the inner layer, wherein the fourth size is bigger than the third size, the fourth size is bigger than the second size, the second size is bigger than the first size, and the third size is bigger than the first size.

A component carrier with an electrically insulating layer having a front side and a back side, a first and a second electrically conductive layer covering the front side and the back side of the electrically insulating layer, respectively. A through hole extends through both electrically conductive layers and the electrically insulating layer. An overhang is formed along one of the electrically conductive layers and sidewalls of the electrically insulating layer structure delimiting the through hole. An annular plating layer covers the sidewalls and fills part of the overhang such that a horizontal extension of the overhang after plating is less than 20 μm and/or such that a ratio between a horizontal extension of the overhang after plating and a width of a first window through the first electrically conductive layer and/or a width of a second window through the second electrically conductive layer is smaller than 20%.

A wiring substrate includes: an insulating substrate comprising a corner constituted by two adjacent surfaces; wiring located continuously across the corner; wherein on at least one of the two adjacent surfaces, a part of the wiring disposed at an edge located at the corner has a thickness larger than a part of the wiring disposed away from the edge.

A printed wiring board includes resin insulating layers including an outermost resin insulating layer, conductor layers laminated on the resin insulating layers, a copper layer formed in the outermost insulating layer, and metal bumps formed on the copper layer such that the bumps have upper surfaces protruding from the outermost insulating layer and that each metal bump includes Ni film, Pd film and Au film. The copper layer is reduced in diameter toward upper surface side such that the copper layer has upper and bottom surfaces and each upper surface has diameter that is smaller than diameter of each bottom surface, the outermost insulating layer has cylindrical sidewalls formed such that at least part of the copper layer is not in contact with the sidewalls, and the bumps are formed such that the Ni film is filling spaces between the copper layer and the sidewalls of the outermost insulating layer.

A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure. At least one electrically insulating layer structure has at least partly tapering through holes filled substantially completely with an electrically conductive filling. The at least one electrically conductive layer structure and the electrically conductive filling are made of the same material. In addition, different ones of the through holes of one electrically insulating layer structure are tapering in opposite directions.

An electronic device with high density for component arrangement includes a first substrate, a second substrate, a plural of passages formed through the first and the second substrates, a first contact arranged on the first face of the first substrate to conceal the corresponding one of the passages, a second contact arranged on the second substrate and adjacent to the corresponding one of the passages, and a conductor disposed in the passages. A first end of the conductor electrically connects the first contact, while a second end of the conductor electrically connects the second contact.

A connection method for a chip and a circuit board includes: placing the circuit board on the chip, the circuit board having a first surface in contact with the chip having a plurality of contacts, and the circuit board having a plurality of through holes aligned with the plurality of contacts respectively; placing a mask on a second surface of the circuit board, the mask having a plurality of openings aligned with the plurality of through holes respectively; covering a surface of the mask with a conductive adhesive to fill the plurality of through holes with the conductive adhesive; and keeping portions of the conductive adhesive that are respectively in the plurality of through holes to be spaced apart from each other. The portions of the conductive adhesive that fill the plurality of through holes remain to provide an electrical connection between the circuit board and the chip.