In a method for producing an electronic part mounting substrate wherein an electronic part 14 is mounted on one major surface (a surface to which the electronic part 14 is to be bonded) of the metal plate 10 of copper, or aluminum or the aluminum alloy (when a plating film 20 of copper is formed on the surface), the one major surface of the metal plate 10 (or the surface of the plating film 20 of copper) is surface-machined to be coarsened so as to have a surface roughness of not less than 0.4 μm, and then, a silver paste is applied on the surface-machined major surface (or the surface-machined surface of the plating film 20 of copper) to arrange the electronic part 14 thereon to sinter silver in the silver paste to form a silver bonding layer 12 to bond the electronic part 14 to the one major surface of the metal plate 10 (or the surface of the plating film 20 of copper) with the silver bonding layer 12.

The present invention provides a carrier-attached copper foil, wherein an ultrathin copper foil is not peeled from the carrier prior to the lamination to an insulating substrate, but can be peeled from the carrier after the lamination to the insulating substrate. A carrier-attached copper foil comprising a copper foil carrier, an intermediate layer laminated on the copper foil carrier, and an ultrathin copper layer laminated on the intermediate layer, wherein the intermediate foil is configured with a Ni layer in contact with an interface of the copper foil carrier and a Cr layer in contact with an interface of the ultrathin copper layer, said Ni layer containing 1,000-40,000 μg/dm.sup.2 of Ni and said Cr layer containing 10-100 μg/dm.sup.2 of Cr is provided.

A ceramic circuit substrate is suitable for silver nanoparticle bonding of semiconductor elements and has excellent close adhesiveness with a power module sealing resin. A ceramic circuit substrate has a copper plate bonded, by a braze material, to both main surfaces of a ceramic substrate including aluminum nitride or silicon nitride, the copper plate of at least one of the main surfaces being subjected to silver plating, wherein: the copper plate side surfaces are not subjected to silver plating; the thickness of the silver plating is 0.1 μm to 1.5 μm; and the arithmetic mean roughness Ra of the surface roughness of the circuit substrate after silver plating is 0.1 μm to 1.5 μm.

The disclosure discloses a flexible copper clad laminate (FCCL) having a high peel strength and a manufacturing method thereof. The FCCL includes: an organic polymer film layer (1), an adjusting layer (2), a transition layer (3) and a copper layer (4).

PROBLEMS TO BE SOLVED: To provide a process for roughening both sides of a copper plate by forming a protrusion with a fine bump shape on the both sides of the copper plate, and then to provide a process for a deterioration of an electroplating solution for plating copper to become hard to progress therein. MEANS FOR SOLVING THE PROBLEMS: First of all, there is designed to be arranged electrodes (3, 3) as a similar pole for therebetween to be opposed to each other in an electroplating copper solution 2, and then to be arranged a copper plate 4 at therebetween. And then at first there becomes to be performed an anodic treatment for generating a copper fine particles on both surfaces of the copper plate 4, by performing an electrolytic process with the copper plate 4 as a positive electrode and the electrodes 3 as negative electrodes. And then thereafter there becomes to be performed a cathodic treatment, by performing an electroplating of copper with the copper plate 4 as a negative electrode and the electrodes 3 as positive electrodes, for the copper fine particles to be fixed onto the surfaces of the copper plate 4. Furthermore, there becomes to be formed the above mentioned protrusion with the fine bump shape thereon, by performing the anodic treatment and then the cathodic treatment as not less than one cycle thereof.

A printed wiring board includes a first resin insulating layer, a conductor layer on the first resin insulating layer, and a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer is covering the conductor layer. The conductor layer includes a first circuit having a width of 15 μm or less and a rectangular cross-sectional shape, a second circuit having a trapezoidal cross-sectional shape, a third circuit, a fourth circuit, a fifth circuit, and a sixth circuit, a space between the first and third circuits has a width of 14 μm or less, a space between the first and fourth circuits has a width of 14 μm or less, a space between the second and fifth circuits has a width of 20 μm or more, and a space between the second and sixth circuits has a width of 20 μm or more.

Electrical insulating properties between adjacent copper plates are improved while a defect of a bonded substrate which is caused by concentration of stress to end portions of the copper plates is prevented. A bonded substrate includes a silicon nitride ceramic substrate, a copper plate, and a bonding layer. The copper plate and the bonding layer are disposed on the silicon nitride ceramic substrate. The bonding layer bonds the copper plate to the silicon nitride ceramic substrate. The bonding layer includes: an interplate portion between the silicon nitride ceramic substrate and the copper plate; and a protruding portion protruding from between the silicon nitride ceramic substrate and the copper plate. Exposure of the silicon nitride ceramic substrate is prevented at a position where the protruding portion is disposed.

Disclosed herein relates to a copper foil having a low roughness property by roughening a matte side, wherein a thickness of the copper foil is from 5 μm to 70 μm, and profilometer-measured mean roughness of the roughened surface of the copper foil is from 0.5 μm to 2.0 μm, and wherein profilometer-measured mean roughness Rz JIS of the roughened matte side of the copper foil is lower than that of a shiny side of the copper foil. The copper foil provided in the present invention has excellent adhesion with a resin and an electrical property while having low roughness through surface roughening.

A printed wiring board includes a first resin insulating layer, a second resin insulating layer formed on a surface of the first layer, and a conductor layer formed on the surface of the first layer such that the second layer is covering the conductor layer and that the conductor layer includes first, second, third, fourth, fifth, and sixth circuits such that the third and fourth circuits are sandwiching the first circuit and that the fifth and sixth circuits are sandwiching the second circuit. Widths between the first and third circuits and between the first and fourth circuits are 5 μm to 14 μm, and when a width between the second and fifth circuits and a width between the second and sixth circuits is 20 μm or more, the upper surface of the first circuit, and the upper surface and side walls of the second circuit are formed to have unevenness.

There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the roughened surface of the insulating substrate to form an electroless plating layer less than 1.0 μm thick having a surface having an arithmetic mean waviness Wa of 0.10 μm or more and 0.25 μm or less as measured in accordance with JIS B0601-2001 and a kurtosis Sku of 2.0 or more and 3.5 or less as measured in accordance with ISO 25178; laminating a photoresist on the surface of the electroless plating layer; performing exposure and development to form a resist pattern; applying electroplating to the electroless plating layer; stripping the resist pattern; and etching away an unnecessary portion of the electroless plating layer to form a wiring pattern.