A manufacturing method of the present disclosure is a method for manufacturing a wiring body. The manufacturing method includes a growth process, a transfer process, and a peeling process. In the growth process, a conductive layer of a wiring body is grown on a catalyst provided on a pattern plate. In the transfer process, the conductive layer on the pattern plate is transferred to an insulator. In the peeling process, the conductive layer is peeled off from the pattern plate together with the insulator. When the wiring body is manufactured a plurality of times, the growth process, the transfer process, and the peeling process are repeatedly executed using the same pattern plate.

The present invention is directed to provide novel composite copper components. For example, provided is a composite copper component including a copper oxide-containing layer formed on at least a portion of the surface of a copper component, in which when the surface of the composite copper component is bonded to a resin substrate by thermocompression, and the copper component is peeled off from the resin substrate after the thermocompression bonding, metal contained in the copper oxide-containing layer is transferred to the resin substrate.

The present invention is to provide a microstructure capable of improving the withstand voltage of an insulating substrate while securing fine conductive paths, a multilayer wiring board, a semiconductor package, and a microstructure manufacturing method. The microstructure of the present invention has an insulating substrate having a plurality of through holes, and conductive paths consisting of a conductive material containing metal filling the plurality of through holes, in which an average opening diameter of the plurality of through holes is 5 nm to 500 nm, an average value of the shortest distances connecting the through holes adjacent to each other is 10 nm to 300 nm, and a moisture content is 0.005% or less with respect to the total mass of the microstructure.

A manufacturing method for circuit board on copper ceramic substrate comprises stamping a copper sheet into a copper circuit board in a shape matching a ceramic substrate, fitting the copper circuit board to the ceramic substrate and sintering the copper circuit board and the ceramic substrate together by direct bonding copper.

A printed circuit board includes a substrate, and a wiring provided on the substrate. The wiring includes a copper-based metal wire provided on the substrate and a surface-treated layer provided on the copper-based metal wire. The copper-based metal wire includes mainly a copper. The surface-treated layer includes an amorphous layer including oxygen and a metal with a higher oxygen affinity than the copper.

Embodiments of the present invention relate generally to methods of treating metal surfaces to enhance adhesion or binding to substrates, and devices formed thereby. In some embodiments of the present invention, methods of achieving improved bonding strength without roughening the topography of a metal surface are provided. The metal surface obtained by this method provides strong bonding to resin layers. The bonding interface between the treated metal and the resin layer exhibits resistance to heat, moisture, and chemicals involved in post-lamination process steps, and therefore can suitably be used in the production of PCB's. Methods according to some embodiments of the present invention are especially useful in the fabrication of high density multilayer PCB's, in particular for PCB's having circuits with line/spacing of equal to and less than 10 microns. Methods according to other embodiments of the present invention are particularly useful in the coating of metal surfaces in a wide variety of applications.

A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.

An insulation layer formation method comprises: a first step in which a surface treatment is applied to a base material to form thereon a high-resistance layer having high electric resistivity; a second step in which metal plating parts are formed on the base material that has undergone the first step in such a manner as to allow a high-resistance layer to be formed thereon; and a third process in which a high-resistance layer is formed on the base material that has undergone the second step.

A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.

A process for manufacturing an electronic component having attaches includes providing a first component having a first attach, forming trenches on a portion of the first attach with a laser to form a solder stop, and providing a second component comprising a second attach. The process further includes providing solder between the first attach and the second attach to form a connection between the first component and the second component, where the trenches contain the solder to a usable area. A device produced by the process is disclosed as well.