The present application provides an asymmetric board, which includes the first master board, the second master board, and the insulating dielectric layer sandwiched between the first master board and the second master board, and the depth control grooves are disposed in the connection position between the units on the asymmetric board, and located on the surface of the second master board and extending a toward the side of the first master board, the depth control grooves provide space for the expansion of the second master board, reduce the stress of the units, and reduce the warping of the second master board. When the number of the depth control grooves in the first direction and/or the second direction is greater than 0, the depths of the depth control grooves increase by X from a center to an edge of the asymmetric board, and the X is greater than or equal to 0.

Disclosed are an embedded circuit board and a fabrication method therefor. The embedded circuit board comprises: a circuit board body; signal transmission layers (1200), wherein the signal transmission layers are arranged on two opposite sides of the circuit board body; bonding layers, wherein the bonding layers are arranged between at least one signal transmission layer and the circuit board body and used for bonding the signal transmission layer to the circuit board body; metal bases which are embedded in the circuit board body and are electrically connected to the signal transmission layers on two opposite sides of the circuit board body; conductive parts which are arranged at the positions in the bonding layers corresponding to the metal bases, and are electrically connected to the signal transmission layer and the metal bases; and magnetic cores embedded in the circuit board body.

An electromagnetic wave transmission board proofed against internal signal leakage includes an inner plate, a first outer plate, a second outer plate, a first plate bump, a first conductive bump, a second plate bump, and a second conductive bump. The inner plate defines a first through hole with a plated metal layer on the hole wall. The first and second plated bumps are disposed between the first outer and inner plates. The second plate bump and the second conductive bump are disposed between the second outer plate and the inner plate. The plate metal layer, the first plate bump, the first conductive bump, the first outer plate, the second outer plate, the second conductive bump, and the second plated bump jointly form an air-filled chamber. A method for manufacturing the electromagnetic wave transmission board is also provided.

In manufacturing a printed circuit board using a semi-additive method, a removal liquid that has been used in removing a nickel-chromium-containing layer (5) is regenerated by contacting the removal liquid with a chelate resin having a functional group represented by a following formula (1) :

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where a plurality of Rs are identical divalent hydrocarbon groups having 1 to 5 carbons, and a portion of hydrogen atoms may be substituted with halogen atoms.

A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole.

Some features pertain to a substrate that includes a first portion of the substrate including a first plurality of metal layers, a second portion of the substrate including a second plurality of metal layers, and a plurality of insulating layers configured to separate the first plurality of metal layers and the second plurality of metal layers. A first plurality of posts and a plurality of interconnects are coupled together such that the first plurality of posts and the plurality of interconnects couple the first portion of the substrate to the second portion of the substrate.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.

A component carrier assembly includes a first component carrier having a first electrically insulating layer structure and a via in the first electrically insulating layer structure, where the via is at least partially filled with electrically conductive material and where an upper part of the via extends beyond an outer main surface of the first component carrier; and a second component carrier having a second electrically insulating layer structure, and an electrically conductive adhesive material that is at least partially embedded in the second electrically insulating layer structure. The first component carrier and the second component carrier are interconnected and the upper part of the via at least partially penetrates into the electrically conductive adhesive material.

The present application provides an asymmetric board, which includes the first master board, the second master board, and the insulating dielectric layer sandwiched between the first master board and the second master board, and the depth control grooves are disposed in the connection position between the units on the asymmetric board, and located on the surface of the second master board and extending a toward the side of the first master board, the depth control grooves provide space for the expansion of the second master board, reduce the stress of the units, and reduce the warping of the second master board. When the number of the depth control grooves in the first direction and/or the second direction is greater than 0, the depths of the depth control grooves increase by X from a center to an edge of the asymmetric board, and the X is greater than or equal to 0.

A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.