A microwave dielectric component (100) comprises a microwave dielectric substrate (101) and a metal layer, the metal layer being bonded to a surface of the microwave dielectric substrate (101). The metal layer comprises a conductive seed layer and a metal thickening layer (105). The conductive seed layer comprises an ion implantation layer (103) implanted into the surface of the microwave dielectric substrate (101) and a plasma deposition layer (104) adhered on the ion implantation layer (103). The metal thickening layer (105) is adhered on the plasma deposition layer (104). A manufacturing method of the microwave dielectric component (100) is further disclosed.

The present invention discloses an ion beam lithography method based on an ion beam lithography system. The ion beam lithography system includes a roll-roll printer placed in a vacuum, and a medium-high-energy wide-range ion source, a medium-low-energy wide-range ion source and a low-energy ion source installed on the roll-roll printer. The ion beam lithography method includes: first coating a polyimide (PI) substrate with a dry film, etching the dry film according to a preset circuit pattern, then using the ion beam lithography system to deposit a wide-energy-range metal ion on the circuit pattern to form a film substrate, and finally stripping the dry film off the film substrate to obtain a printed circuit board (PCB).

A method for manufacturing a flexible circuit board is provided. The method for manufacturing a flexible circuit board includes the following steps: providing a carrier substrate, forming a flexible substrate on the carrier substrate, and forming a plurality of circuit strings on the flexible substrate. A flexible circuit board manufactured by the above method is also provided.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A method of mass spectral analysis in an analytical electrostatic trap (14) is disclosed. The electrostatic trap (14) defines an electrostatic field volume and includes trap electrodes having static and non-ramped potentials. The method comprises injecting a continuous ion beam into the electrostatic field volume.

A method of mass spectral analysis in an analytical electrostatic trap (14) is disclosed. The electrostatic trap (14) defines an electrostatic field volume and includes trap electrodes having static and non-ramped potentials. The method comprises injecting a continuous ion beam into the electrostatic field volume.

A multi-layer circuit board, successively constituted by surface sticking layer, single-layer circuit board, middle sticking layer, single-layer circuit board, surface sticking layer, said multi-layer circuit board is provided with a hole, a hole wall of said hole is formed with conductive seed layer, and partial outer surface of said surface sticking layer is formed with a circuit pattern layer of conductive seed layer, wherein said conductive seed layer comprises a ion implantation layer implanting below the hole wall of said hole and below partial outer surface of said surface sticking layer.

A conductive network fabrication process is provided and includes filling a hole formed in a substrate with dielectric material, laminating films of the dielectric material on either side of the substrate, opening a through-hole through the dielectric material at the hole, depositing a conformal coating of dielectric material onto an interior surface of the through-hole and executing seed layer metallization onto the conformal coating in the through-hole to form a seed layer extending continuously along an entire length of the through-hole.

A method for directly writing metal traces on a wide range of substrate materials is disclosed. The method includes writing a pattern of particle-free metal-salt-based ink on the substrate followed by a plasma-based treatment to remove the non-metallic components of the ink and decompose its metal salt into pure metal. The ink is based on a multi-part solvent whose components differ in at least one of evaporation rate, surface tension, and viscosity, which improves the manner in which the ink is converted into its metal constituent via the plasma treatment. In some embodiments, a microplasma is used for post-treatment of the deposited ink, where the plasma properties are controlled to provide different material properties, such as porosity and effective resistivity, in different regions of the metal pattern.

The invention discloses a thin film transistor, a display panel and a method of fabricating the thin film transistor. The thin film transistor includes a substrate, a flat film, a dielectric layer, an active layer, and a source/drain layer which are stacked in sequence from bottom to top; and a plurality of reinforcing portions are disposed on an upper surface of the flat film, wherein the flat film and the reinforcing portions constitute a gate layer, wherein the reinforcing portions are configured to increase an area of the upper surface of the flat film, so as to increase an effective overlapping area between the flat film and the active layer, and reduce a width and a length of the thin film transistor.