Patent classifications
H05K2203/122
PHOSPHAZENE COMPOUND CONTAINING ESTER GROUP, PREPARATION METHOD AND USE THEREOF
The present invention relates to a phosphazene compound containing an ester group having a structure of formula (I). The present invention grafts ester groups to phosphazene compounds and makes terminal grafted hydroxyl and carboxyl groups reacted with polymer matrix, producing an improvement of flame retardancy and a reduction of dielectric constant at the same time when the phosphazene compound is introduced into polymer matrix. Since N and P atoms are directly bonded into the polymer matrix by a reaction rather than addition and combination means in the prior art, there is no reduced mechanical properties of the matrix due to the addition of flame retardants.
INTEGRATED MINIATURE WELDING PLATE STRUCTURE AND MANUFACTURING PROCESS THEREFOR
The present invention discloses an integrated miniature welding plate structure and manufacturing process therefor, which consists of pads with welded dots, welding wires and a welding plate; the manufacturing process of the welding plate consists of following steps: S1. Punching holes, take a SMT patch fixed with several welding plates, punch holes in the welding plates in accordance with the requirements; S2 Electroplating, electroplate a metal layer with electroplating process onto the inner walls of the holes in each of the welding plates; S3. Gluing, pour the insulation colloid into the holes in each of the welding plates, then electroplate a metal layer onto both ends of the colloid; S4. Cutting, cut each of the welding plates off the patch. The beneficial effects are: the welding wires are welded with the welding plates, then the welding plates are connected with the welded dots of the to-be-welded parts, the adopted welding method of the welding plates can improve the overall welding efficiency, ensure the welding strength of the welded dots and improve the welding quality; the structure design of the base plate and vertical plate is adopted for the welding plates, the welding wires are welded onto the vertical plates in a centralized manner, so the status that the welding wires not being parallel and upright can be obviously improved.
PROCESS FOR LOCALIZED REPAIR OF GRAPHENE-COATED LAMINATION STACKS AND PRINTED CIRCUIT BOARDS
Processes for localized lasering of a lamination stack and graphene-coated printed circuit board (PCB) are disclosed. An example PCB may include a lamination stack, post-lamination, that may further include a core, an adhesive layer, and at least one graphene-metal structure. A top layer of graphene of the graphene-metal structure may have never been grown before the lamination process or may have been removed post-lamination such that a portion of the top layer of graphene is missing. The localized lasering process described herein may grow (for the first time) or re-grow the graphene layer of the exposed portion of the metal layer without adverse effects to the rest of the lamination stack or PCB and while promoting a uniform layer of graphene on the top surface. A process of growing graphene through application of molecular layer and a self-assembled monolayer (SAM), are also described herein.
COMPOSITION AND METHOD FOR PRODUCING SAME
Provided is a composition having moderate viscosity for coating properties and ejection properties, being applicable for firing at low temperatures, and leaving an extremely small amount of ash after firing. The composition of the present disclosure contains a miscible material of a compound represented by Formula (1) below and a compound (A) represented by Formula (A) below. In Formula (1) below, R.sup.1 represents a linear aliphatic hydrocarbon group having from 10 to 25 carbons; R.sup.2 and R.sup.3 are identical or different and represent an aliphatic hydrocarbon group having 2, 4, 6, or 8 carbons; R.sup.4 represents an aliphatic hydrocarbon group having from 1 to 8 carbons; R.sup.5 and R.sup.6 are identical or different and represent an aliphatic hydrocarbon group having from 1 to 3 carbons or a hydroxyalkyl ether group; and L.sup.1 to L.sup.3 represent an amide bond. In Formula (A) below, in the formula, R.sup.a and R.sup.c are identical or different and represent a hydrogen atom or an aliphatic hydrocarbon group that has from 1 to 12 carbons and may have a substituent; R.sup.b represents an aliphatic hydrocarbon group that has from 1 to 12 carbons and may have a substituent; and the substituents are each an amino group and/or a hydroxyl group.
Interconnect substrate and method of making the same
An interconnect substrate includes a first insulating layer, an interconnect layer formed on a first surface of the first insulating layer, and a second insulating layer formed on the first surface of the first insulating layer to cover the interconnect layer, wherein the second insulating layer includes a first resin layer and a second resin layer, the first resin layer covering at least part of a surface of the interconnect layer exposed outside the first insulating layer, the second resin layer covering the first resin layer, wherein both the first resin layer and the second resin layer contain a resin and a filler, and wherein a proportion of the resin in the first resin layer per unit area is higher than a proportion of the resin in the second resin layer per unit area.
METAL PARTICLE COMPOSITION, METHOD FOR PRODUCING METAL PARTICLE COMPOSITION, AND PASTE
To provide a metal particle composition having excellent oxidation resistance, which does not require a transition metal catalyst and can be applied to existing metal particles, a method for producing the metal particle composition, and a paste. The metal particle composition contains, with respect to 100 parts by mass of metal particles, 0.1 to 5 parts by mass of a compound (A) having a structure represented by the following general formula (I):
##STR00001## in which R.sup.1 and R.sup.2 each independently represent a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, an alkenyl group having 2 to 6 carbon atoms, an aryl group, or an aralkyl group, R.sup.3 and R.sup.4 each independently represent a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, an alkoxy group, an alkenyl group having 2 to 6 carbon atoms, an alkenyloxy group, an aryl group, or an aralkyl group.
Metallic nanoparticle dispersion
A metallic nanoparticle dispersion includes metallic nanoparticles and a compound according to Formula I, ##STR00001##
wherein X represents the necessary atoms to form a substituted or unsubstituted ring. The presence of small amounts of the compound according to Formula I increases the conductivity of metallic layers or patterns formed from the metallic nanoparticle dispersions at moderate curing conditions.
Method of treating gold or gold alloy with a surface treatment solution comprising a disulfide compound
To provide a surface treatment solution and treatment method for gold or gold alloy plating that effectively suppresses corrosion of underlying metal or substrate metal from pinholes that develop on the gold or gold alloy plating film. [Solution] A surface treatment solution containing a disulfide compound is brought into contact with a gold or gold alloy plating film. A compound represented by the following formula (2) is preferred as the disulfide compound.
X.sup.1O.sub.3S—R.sup.3—S—S—R.sup.4—SO.sub.3X.sup.2 (2)
in the formula, R.sup.3 and R.sup.4 independently represent a linear or branched alkylene group having from 1 to 10 carbon atoms, cyclic alkylene group having from 3 to 10 carbon atoms, or phenylene group, R.sup.3 and R.sup.4 independently may be substituted by one or more substituents selected from an alkyl group, halogen atom, hydroxyl group, or alkoxy group, and X.sup.1 and X.sup.2 represent monovalent cations.
Local dense patch for board assembly utilizing laser structuring metallization process
Methods of forming microelectronic package structures are described. Those methods/structures may include forming a high density region on a board comprising a first plurality of conductive structures disposed on a dielectric material on the board, wherein the first plurality of conductive structures comprises a first pitch between individual ones of the first plurality of conductive structures. A low density region on the board comprises a second plurality of conductive structures disposed on the dielectric material, wherein the second plurality of conductive structures comprises a second pitch between individual ones of the second plurality of conductive structures, wherein the second pitch is more than about twice the magnitude of the first pitch.
SEMICONDUCTOR PACKAGE SUBSTRATE HAVING AN INTERFACIAL LAYER
Semiconductor package substrates and methods of forming semiconductor package substrates are described. In an example, a semiconductor package substrate includes an interfacial layer between a metal layer and a dielectric layer. For example, the interfacial layer may be attached to the metal layer and the dielectric layer by a chemical bond, e.g., a coordinate bond or a covalent bond. Accordingly, the metal layer may adhere to the dielectric layer.