Embodiments of the present invention are directed to an in-situ warpage monitoring system and method for preventing head-in-pillow (HIP) or other potential defect escapes during a solder reflow process. In a non-limiting embodiment of the invention, a product is passed through a reflow oven. The product can include a printed circuit board (PCB). An amount of warpage of the product is measured at one or more monitoring devices positioned along the reflow oven. Each measured amount of warpage is compared to a predetermined warpage limit. The product is sorted into one of a plurality of designated lots based on the comparison. The lots can include a pass lot, a fail lot, and a marginal pass lot.

An electronic card comprising: a first card portion including lightning protection components, a first ground plane and a first ground zone; a second card portion comprising functional components, a second ground plane and a second ground zone; a third card portion, which separates and electrically isolates the first ground plane and the first ground zone from the second ground plane and from the second ground zone; the first ground zone and the second ground zone being unvarnished; the first ground zone and the second ground zone being arranged in order to be applied onto a housing element that is electrically conductive and that belongs to a housing in which the electronic card is integrated.

A memory module operation system for operating in high stress environments with strong vibration. The application and use of a retainer to reduce and dampen the effects of system vibration and the application of dynamic loads can retain a memory module in place in a memory socket. Further, the retainer can operate to reduce the effects of electromagnetic interference and can act as a heat transport system to reduce thermal stress on components.

An apparatus for producing a printed circuit board on a substrate, has a table for supporting the substrate, a function head configured to effect printing conductive and non-conductive materials on the substrate, a positioner configured to effect movement of the function head relative to the table, and a controller configured to operate the function head and the positioner to effect the printing of conductive and non-conductive materials on the substrate. The apparatus optionally has a layout translation module configured to convert PCB files or multilayer PCB files to printing data for controlling the function head to print conductive material and nonconductive material onto the substrate. The apparatus has a testing head to verify conductors which operates automatically. The translation module also prints nonconductive material component alignment areas and nonconductive material substrate stiffeners.

A method for assessing a thermal path associated with an integrated circuit includes identifying a heat application mode based on a design type of the integrated circuit. The method also includes measuring a first temperature of at least one thermal sensing device associated with the integrated circuit. The method also includes applying heat to at least a portion of the integrated circuit according to the heat application mode. The method also includes measuring a second temperature of the at least one thermal sensing device. The method also includes determining a difference between the first temperature and the second temperature. The method also includes determining whether a thermal path between the integrated circuit and an associated substrate is sufficient based on a comparison of the difference between the first temperature and the second temperature with a predetermined difference between an initial temperature and a subsequent temperature of the at least one thermal sensing device.

A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

Methods, systems, and computer program products for determining a property of construction material. According to one aspect, a material property gauge operable to determine a property of construction material is disclosed. The gauge may include an electromagnetic sensor operable to measure a response of construction material to an electromagnetic field. Further, the electromagnetic sensor may be operable to produce a signal representing the measured response by the construction material to the electromagnetic field. An acoustic detector may be operable to detect a response of the construction material to the acoustical energy. Further, the acoustic detector may be operable to produce a signal representing the detected response by the construction material to the acoustical energy. A material property calculation function may be configured to calculate a property value associated with the construction material based upon the signals produced by the electromagnetic sensor and the acoustic detector.

A substrate for contacting an electrical pin arranged in a housing includes a base having a recess receiving the electrical pin, a metal leadframe having a contacting region electrically and/or thermally contacting the electrical pin, and a contact pin extending along a mating direction in a plane parallel to the metal leadframe and configured to electrically contact a mating contact pin of a mating connector. The metal leadframe is rigidly fixed to the base to prevent a relative movement between the metal leadframe and the substrate. The substrate is movable with respect to the housing along a locking direction from an unlocked position where the substrate is not locked to the housing to a locked position in which the substrate is locked to the housing. A movement of the contacting region with respect to the electrical pin is prevented in the locked position.

In examples, a method of manufacturing a semiconductor package comprises providing an array of unsingulated semiconductor packages, the array having a bottom surface and a conductive terminal exposed to the bottom surface, the conductive terminal including a slot configured to receive solder material. The method includes coupling a tape to the array of unsingulated semiconductor packages and applying a first saw blade to the bottom surface of the array to partially saw through a thickness of the array to a depth between two individual, adjacent, unsingulated semiconductor packages in the array of unsingulated semiconductor packages, the first saw blade producing a kerf. The method includes applying a second saw blade into the kerf to fully saw through the thickness of the array and produce a singulated semiconductor package, a width of the second saw blade narrower than the first saw blade. The conductive terminal is exposed to a side surface of the singulated semiconductor package, the side surface including a recessed area having a horizontal depth of no more than 30 microns.