An embedded module according to the present invention includes a base substrate having a multi-layer wiring, at least two semiconductor chip elements having different element thicknesses, each of the semiconductor chip element having a first surface fixed to the base substrate and having a connection part on a second surface, an insulating photosensitive resin layer enclosing the semiconductor chip elements on the base substrate and being formed by a first wiring photo via, a second wiring photo via, and a wiring, the first wiring photo via electrically connected to the connection part of the semiconductor chip elements, the second wiring photo via arranged at the outer periphery of each of the semiconductor chip elements and electrically connected to a connection part of the base substrate, the wiring arranged so as to be orthogonal to and electrically connected to the first wiring photo via and the second wiring photo via.

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

A component carrier with an electrically insulating layer structure has opposed main surfaces, a through-hole, and an electrically conductive bridge structure connecting opposing sidewalls delimiting the through-hole. The sidewalls have a first tapering portion extending from a first main surface and a second tapering portion extending from a second main surface. A first demarcation surface faces the first main surface and a second demarcation surface faces the second main surface. A central bridge plane extends parallel to the first main surface and the second main surface and is at a vertical center between a lowermost point of the first demarcation surface and an uppermost point of the second demarcation surface. A first intersection point is between the central bridge plane and one of the sidewalls delimiting the through hole. A length of a shortest distance from the first intersection point to the first demarcation surface is at least 8 μm.

A heat sink component can include a body including a thermally conductive material that is electrically non-conductive, a lower conductive layer formed over a bottom surface of the body and electrically connected with the ground plane layer, and an upper conductive layer formed over a top surface of the body. The heat sink component can have a length in an X-direction that is parallel with the top surface of the body and a thickness in a direction perpendicular to the top surface. A ratio of the length to the thickness can be greater than about 7.

A circuit board includes a metal substrate, a resin layer, an insulating layer, and a first conductive structure. The metal substrate has a first through hole, and the first through hole has a first width. A portion of the resin layer is disposed in the first through hole. The resin layer has a second through hole. The second through hole has a second width. The insulating layer is disposed on at least one surface of the metal substrate, and a portion of the insulating layer contacts the resin layer. The first conductive structure is disposed in the second through hole. The first conductive structure penetrates through the metal substrate. The first width is greater than the second width. A manufacturing method of the circuit board is also provided.

Embodiments disclosed herein comprise package substrates and methods of forming package substrates. In an embodiment, a package substrate comprises a core substrate. A hole is disposed into the core substrate, and a via is disposed in the hole. In an embodiment, the via completely fills the hole. In an embodiment, a method of forming a package substrate comprises exposing a region of a core substrate with a laser. In an embodiment, the laser changes the morphology of the exposed region. The method may further comprise etching the core substrate, where the exposed region etches at a faster rate than the remainder of the core substrate to form a hole in the core substrate. The method may further comprise disposing a via in the hole.

Embodiments disclosed herein include package substrates for electronic packaging applications. In an embodiment, a package substrate comprises a first glass layer, where the first glass layer comprises a first via through the first glass layer, and the first via has an hourglass shaped cross-section. The package substrate may further comprise a second glass layer over the first glass layer, where the second glass layer comprises a second via through the second glass layer, and where the second via has the hourglass shaped cross-section. In an embodiment, the first via is electrically coupled to the second via.

A magnetic element includes a first magnetic column, a second magnetic column, a first winding wound around the first magnetic column, and a second winding wound around the second magnetic column. The first winding includes a first horizontal winding, a second horizontal winding, a first vertical winding, and a second vertical winding. The second winding includes a third horizontal winding, a fourth horizontal winding, a third vertical winding, and a fourth vertical winding. The first vertical winding and the third vertical winding are disposed on or in a first circuit board and a second circuit board respectively, the second vertical winding and the fourth vertical winding are disposed on or in a third circuit board. The first circuit board, the first magnetic column, the third circuit board, the second magnetic column, and the second circuit board are sequentially bonded to form a pre-package.

An adapter board is described having a substrate having a width, a length and a depth and at least one electrical component placed one of within the substrate and on a surface of the substrate. The adapter board may also have a first pad positioned on the substrate, the first pad connected to the at least one electrical component through a first via. The adapter board may also have a second pad positioned on the substrate, the second pad connected to the at least one electrical component through a second via, wherein at least a portion of the adapter board is configured through an additive manufacturing process and wherein the substrate is configured to be installed within a downhole tool.

A multilayer PCB structure includes a core layer, a first layer on a first surface of the core layer, a second layer on a second surface of the core layer, and a thermally conductive material in the core layer. The first surface and the second surface of the core layer are opposite to each other, and a window is formed on the second layer by removing part of the second layer. The window of the second layer exposes part of the core layer below the thermally conductive material.