Inside an IGBT using GaN or SiC, light having an energy of approximately 3 [eV] is generated. Therefore, defects are caused in the gate insulating film of the IGBT. Furthermore, the charge trapped at a deep level becomes excited and moves to the channel region, thereby causing the gate threshold voltage to fluctuate from the predetermined value. Provided is a semiconductor device including a normally-ON semiconductor element that includes a first semiconductor layer capable of conductivity modulation and a first gate electrode, but does not include a gate insulating film between the first gate electrode and the first semiconductor layer; and a normally-OFF semiconductor element that includes a second semiconductor layer, a second gate electrode, and a gate insulating film between the second semiconductor layer and the second gate electrode. The normally-ON semiconductor element and the normally-OFF semiconductor element are connected in series.

We disclose a bi-directional bipolar junction transistor (BJT) structure, comprising: a base region of a first conductivity type, wherein said base region constitutes a drift region of said structure; first and second collector/emitter (CE) regions, each of a second conductivity type adjacent opposite ends of said base region; wherein said base region is lightly doped relative to said collector/emitter regions; the structure further comprising: a base connection to said base region, wherein said base connection is within or adjacent to said first collector/emitter region.

To provide a semiconductor device, a method for manufacturing a semiconductor device, and an electric power converter realizing prevention of rise of on-voltage in an IGBT and improvement of a reverse recovery characteristic of a diode part by a simpler process. In the semiconductor device 100 (RC-IGBT), in the RC-IGBT having an IGBT part and a diode part in a single chip, a body layer 11 of the diode part is formed shallower than a body layer 10 of the IGBT part, a lifetime control layer 8 of the IGBT part is formed in the body layer 10 of the IGBT part, and the lifetime control layer 8 of the diode part is formed in a drift layer 4 below the body layer 11 of the diode part.

A power conversion device configured to convert electric power using a semiconductor device includes a MOS controlled diode 1 made up of an n.sup.+ layer 11, an n.sup. layer 12, a p.sup. layer 13, a p.sup.+ layer 14, a cathode electrode 21, anode electrodes 22 and 220, and gate electrodes 23 and a voltage applying unit configured to apply forward voltage between the anode electrodes 22 and 220 and the cathode electrode 21 during a forward direction, to apply a reverse voltage between the anode electrodes 20 and 220 and the cathode electrode 21 during a reverse recovery, and to control a potential of the gate electrode 23 to a potential at which an inversion layer is formed in a third semiconductor layer with respect to a potential of the anode electrodes 22 and 220 before the reverse recovery. In this way, a power conversion device, a method of controlling a power conversion device, a semiconductor device, and a method of controlling a semiconductor device that are capable of further reducing power loss are provided.

An object is to increase a tolerance of a gate pulse width in a gate-controlled diode while suppressing detrimental effects on other main electrical characteristics. A gate-controlled diode includes: a diode gate electrode buried in each of first trenches through an oxide film in a first active region; an anode electrode buried in each of second trenches through the oxide film in a second active region; a P type channel layer formed in a surface layer of an N.sup. type semiconductor substrate; and an N.sup.+ type layer formed in a surface layer of the P type channel layer in the first active region. An area of the first active region is 20% or higher and 80% or lower of a sum of the area of the first active region and an area of the second active region.

A silicon carbide device includes a stripe-shaped trench gate structure extending from a first surface into a silicon carbide body. The gate structure is confined along a lateral second direction by a first gate sidewall of the gate structure and a second gate sidewall of the gate structure. The trench gate structure includes a first portion and a second portion laterally displaced from each other along the lateral first direction. In the first portion, the first gate sidewall extends to a first depth and, in the second portion, the first gate sidewall extends to a second depth along the vertical direction into the silicon carbide body. The second depth is greater than the first depth.

A semiconductor device includes an n-type semiconductor layer, trenches, an insulating layer, a third electrode, and a p-type well region. The trenches extend in a first direction orthogonal to the thickness direction of the semiconductor layer and are spaced apart in a second direction orthogonal to the first direction. The insulating layer covers the trenches. The third electrode is formed in the insulating layer in contact with the first electrode. The well region is formed in the surface of the semiconductor layer. The well region extends in a direction intersecting the first direction and is one well regions spaced apart in the first direction. The surface of the semiconductor layer is in ohmic contact with the first electrode at the well surface of the well region. The surface of the semiconductor layer is in Schottky contact with the first electrode at an exposed surface between the well surfaces.