Provided is a semiconductor device, including: a semiconductor substrate including an active portion provided with a transistor portion; an emitter electrode provided above a front surface of the semiconductor substrate; and a protective film provided above the emitter electrode, where the active portion includes: an emitter region of a first conductivity type provided on the front surface of the semiconductor substrate; a contact region of a second conductivity type; and a plurality of trench portions, where the emitter electrode includes an exposed portion not covered by the protective film, and where the active portion includes: in a region in which the exposed portion is provided, a first region; and a second region provided at an outer circumference of the first region and having a channel density lower than that of the first region.

A semiconductor device includes a semiconductor substrate, a plurality of element trenches, and a plurality of termination trenches. The semiconductor substrate includes an element region and a termination region. The element trench has a depth larger than the thickness of a second diffusion layer. The termination trench has a depth larger than the thickness of a first diffusion layer. An interval between the plurality of element trenches is a first trench interval L1. An interval between the element trench included in the plurality of element trenches and situated closest to the termination region and the termination trench included in the plurality of termination trenches and situated closest to the element region is a second trench interval L2. In this case, the first trench interval L1 and the second trench interval L2 are in a relation of L1L21.5L1.

Improve the reliability of a semiconductor device. A resistive element Rg is filled in a trench TR formed in a well region PW of a semiconductor substrate. The resistive element Rg and the trench TR have an endless shape in plan view. The resistive element Rg is connected to a first contact member PG that is electrically connected to a gate pad GP, and a second contact member PG that is electrically connected to a gate wiring GW. Furthermore, a third contact member PG, which electrically connects an emitter electrode EE to the well region PW, is positioned in an area surrounded by an endless shape of the resistive element Rg, between the first and second contact members PG in a Y direction.

The technology of improving the adhesion of the barrier metal film is provided. The semiconductor device includes: a floating region formed between a trench gate electrode and a trench emitter electrode; a stacked film formed on the floating region; an interlayer insulating film formed on the stacked film; a plug penetrating the interlayer insulating film and reaching the stacked film; a barrier metal film formed to cover the interlayer insulating film and the plug; and a metal film formed on the barrier metal film.

A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. A concentration of the first impurity has a maximum value at a first position in a first direction inside the first semiconductor layer. The first direction is from the first electrode toward the second electrode. A concentration of proton is greater than the concentration of the first impurity in the second semiconductor layer. The concentration of the first impurity is greater than the concentration of proton in the third semiconductor layer. The concentration of the first impurity is greater than the concentration of proton in at least a portion of the first semiconductor layer at the second semiconductor layer side. The concentration of proton has a maximum value at a second position positioned at a side of the first position opposite to the first direction.

A power conversion device configured to convert electric power using a semiconductor device includes a MOS controlled diode 1 made up of an n.sup.+ layer 11, an n.sup. layer 12, a p.sup. layer 13, a p.sup.+ layer 14, a cathode electrode 21, anode electrodes 22 and 220, and gate electrodes 23 and a voltage applying unit configured to apply forward voltage between the anode electrodes 22 and 220 and the cathode electrode 21 during a forward direction, to apply a reverse voltage between the anode electrodes 20 and 220 and the cathode electrode 21 during a reverse recovery, and to control a potential of the gate electrode 23 to a potential at which an inversion layer is formed in a third semiconductor layer with respect to a potential of the anode electrodes 22 and 220 before the reverse recovery. In this way, a power conversion device, a method of controlling a power conversion device, a semiconductor device, and a method of controlling a semiconductor device that are capable of further reducing power loss are provided.

An apparatus and an associated method for a reverse-conducting insulated gate bipolar transistors and associated structures. The apparatus includes a substrate disposed between a frontside and a backside, a diode pilot region disposed in the substrate, an insulated gate bipolar transistor (IGBT) region disposed in the substrate, and a diode region with a barrier layer disposed adjacent to each of and between the diode pilot region and the IGBT region. The barrier layer is configured to prevent flow of electrons at a first predetermined current and allow flow of electrons at a second predetermined current.