A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 310.sup.16 cm.sup.3 at a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHZ. Other embodiments of the module are provided along with related methods and components thereof.

One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to provide a radio frequency signal at an output, an output matching network coupled to the output of the power amplifier and configured to provide impedance matching at a fundamental frequency of the radio frequency signal, and a harmonic termination circuit coupled to the output of the power amplifier. The power amplifier is included on a power amplifier die. The output matching network can include a first circuit element electrically connected to an output of the power amplifier by way of a pad on a top surface of a conductive trace, in which the top surface has an unplated portion between the pad the power amplifier die. The harmonic termination circuit can include a second circuit element. The first and second circuit elements can have separate electrical connections to the power amplifier die. Other embodiments of the module are provided along with related methods and components thereof.

One aspect of this disclosure is a power amplifier module that includes a power amplifier die, a first bonding pad on a conductive trace, and a second bonding pad on a conductive trace. The die includes an on-die passive device and a power amplifier. The first bonding pad is electrically connected to the on-die passive device by a first wire bond. The second bonding pad is in a conductive path between the first bonding pad and a radio frequency output of the power amplifier module. The second bonding pad includes a nickel layer having a thickness that is less than 0.5 um, a palladium layer over the nickel layer, and a gold layer over the palladium layer and bonded to a second wire bond that is electrically connected to an output of the power amplifier. Other embodiments of the module are provided along with related methods and components thereof.

One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to amplify a radio frequency (RF) signal and tantalum nitride terminated through wafer via. The power amplifier includes a heterojunction bipolar transistor and a p-type field effect transistor, in which a semiconductor portion of the p-type field effect transistor corresponds to a channel includes the same type of semiconductor material as a collector layer of the heterojunction bipolar transistor. A metal layer in the tantalum nitride terminated through wafer via is included in an electrical connection between the power amplifier on a front side of a substrate and a conductive layer on a back side of the substrate. Other embodiments of the module are provided along with related methods and components thereof.

A semiconductor device includes: a semiconductor substrate; a semiconductor layer on the semiconductor substrate; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode, the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode, a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer, and a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.

One aspect of this disclosure is a power amplifier module that includes a power amplifier die including a power amplifier configured to amplify a radio frequency (RF) signal, the power amplifier including a heterojunction bipolar transistor (HBT) and a p-type field effect transistor (PFET), the PFET including a semiconductor segment that includes substantially the same material as a layer of a collector of the HBT, the semiconductor segment corresponding to a channel of the PFET; a load line electrically connected to an output of the power amplifier and configured to provide impedance matching at a fundamental frequency of the RF signal; and a harmonic termination circuit electrically connected to the output of the power amplifier and configured to terminate at a phase corresponding to a harmonic frequency of the RF signal. Other embodiments of the module are provided along with related methods and components thereof.

One aspect of this disclosure is a power amplifier module that includes a power amplifier; a wire bond pad electrically connected to the power amplifier, the wire bond pad including a nickel layer having a thickness that is less than 0.5 um, a palladium layer over the nickel layer, and a gold layer over the palladium layer; and a conductive trace having a top surface with a plated portion and an unplated portion surrounding the plated portion, the wire bond pad being disposed over the plated portion. Other embodiments of the module are provided along with related methods and components thereof.

A low leakage current switch device (110) is provided which includes a GaN-on-Si substrate (11, 13) with one or more device mesas (41) in which isolation regions (92, 93) are formed using an implant mask (81) to implant ions (91) into an upper portion of the mesa sidewalls and the peripheral region around each elevated surface of the mesa structures exposed by the implant mask, thereby preventing the subsequently formed gate electrode (111) from contacting the peripheral edge and sidewalls of the mesa structures.

A transistor device includes a semiconductor body, a spacer layer, and a field plate. The spacer layer is over at least a portion of a surface of the semiconductor body. The field plate is over at least a portion of the spacer layer, and includes a semiconductor layer between a first refractory metal interposer layer and a second refractory metal interposer layer. By including the semiconductor layer between the first refractory metal interposer layer and the second refractory metal interposer layer, the electromigration of metals in the field plate is significantly reduced. Since electromigration of metals in the field plate is a common cause of transistor device failures, reducing the electromigration of metals in the field plate improves the reliability and lifetime of the transistor device.

A transistor device includes a semiconductor body, a spacer layer, and a field plate. The spacer layer is over at least a portion of a surface of the semiconductor body. The field plate is over at least a portion of the spacer layer, and includes a first current carrying layer, a refractory metal interposer layer over the first current carrying layer, and a second current carrying layer over the refractory metal interposer layer. By including the refractory metal interposer layer between the first current carrying layer and the second current carrying layer, the electromigration of metals in the field plate is significantly reduced. Since electromigration of metals in the field plate is a common cause of transistor device failures, reducing the electromigration of metals in the field plate improves the reliability and lifetime of the transistor device.