A nitride semiconductor device includes a SiC substrate having a hexagonal crystal structure and including a main surface inclined with respect to a c-plane at an off-angle from 2 to 6 in a specific crystal direction, a nitride semiconductor layer located on the main surface of the SiC substrate and including an electron transit layer and an electron supply layer, and a gate electrode, a source electrode, and a drain electrode located on the nitride semiconductor layer. The main surface is parallel to a first direction, a second direction orthogonal to the first direction, and a third direction coinciding with the specific crystal direction in plan view. The source electrode and the drain electrode are separated in the first direction. The gate electrode extends in the second direction between the source electrode and the drain electrode. The first direction intersects the third direction at an angle of 9015.

In certain examples, methods and semiconductor structures are directed to a semiconductor device having a circuit that includes an active region (e.g., a channel region of a transistor) and having a poly crystalline-diamond-based thermal field plate (TFP). The TFP, or a first portion thereof, is oriented over or under the active region. Further, the first portion is located in proximity to the active region for passing heat away from the active region, and includes a layer of poly crystalline-diamond grains with an average grain width dimension and an average thickness dimension, wherein the average grain width dimension and the average thickness dimension characterize the poly crystalline-diamond grains as being more isotropic than columnar. With the first portion, or the entire TFP, being in close proximity of the channel region, during operation of the circuit, the TFP passes heat away from the channel region to maintain a relatively low-temperature circuit.

A semiconductor device and a method for forming the same are provided. The semiconductor device includes a substrate, a buffer layer on the substrate, a channel layer on the buffer layer, a barrier layer on the channel layer and a gate structure on the barrier layer. The gate structure includes a gate layer, a gate electrode layer, a first protection pattern layer and second protection spacers. The gate electrode layer covers the gate layer. The first protection pattern layer covers a first top surface of the gate electrode layer. The second protection spacers cover first side surfaces of the gate electrode layer, second side surfaces of the first protection pattern layer and a portion of the gate layer. First interfaces between the second protection spacers and the gate layer are coplanar with a second interface, which is between the gate electrode layer and the gate layer.

A transistor device and method of fabrication are provided, where the transistor device may include a first dielectric layer disposed on a surface of the semiconductor substrate, a second dielectric layer disposed directly on the first dielectric layer, a third dielectric layer disposed on the second dielectric layer, a gate structure disposed directly on the surface of the semiconductor substrate in the gate channel, and a field plate disposed overlapping the gate structure. The gate may be defined via an opening that extends through the first, second, and third dielectric layers. Portions of the first and second dielectric layers may be interposed directly between the gate structure and the surface of the semiconductor substrate. A portion of the field plate may be disposed in a field plate channel at least partially defined via a second opening that extends through the second dielectric layer and the third dielectric layer.

The semiconductor device includes a multi-finger high electron mobility transistor (HEMT). The multi-finger HEMT includes a two-dimensional electron gas (2-DEG); a plurality of source fingers, wherein a first source finger of the plurality of source fingers extends continuously across the 2-DEG, and a second source finger of the plurality of source fingers is discontinuous across the 2-DEG; and a plurality of drain fingers, wherein the plurality of drain fingers is interdigitated with the plurality of source fingers. The second source finger is part of a current sensing element.

A semiconductor device includes a substrate, a first transistor unit having a first drain electrode, a first gate electrode, and a first source electrode, a second transistor unit having a second source electrode, a second gate electrode, and a second drain electrode, a gate wiring provided between the first source electrode and the second source electrode and electrically connected to the first gate electrode and the second gate electrode, a first cover metal layer electrically connected to the first source electrode, at least an upper portion of the first cover metal layer projecting toward the gate wiring more than the first source electrode, and a second cover metal layer electrically connected to the second source electrode, at least an upper portion of the second cover metal layer projecting toward the gate wiring more than the second source electrode.

To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer provided over the substrate; a second nitride semiconductor layer that is on the first nitride semiconductor layer and includes a band gap larger than a band gap of the first nitride semiconductor layer; and a third nitride semiconductor layer that is on the second nitride semiconductor layer and includes a band gap larger than the band gap of the first nitride semiconductor layer. The second nitride semiconductor layer includes a damaged region in which an n-type impurity is selectively added by ion implantation. A diffusion region in which the n-type impurity is diffused is present in a vicinity of the damaged region. The nitride semiconductor device further includes: an ohmic electrode provided above the damaged region. The ohmic electrode is in ohmic contact with the diffusion region.

A semiconductor substrate, a semiconductor device, a method for manufacturing a semiconductor substrate, and a method for manufacturing a semiconductor device are provided. The semiconductor substrate has a thermal conduction layer, a SiC (silicon carbide) layer formed on one principal surface side of the thermal conduction layer, having a 3C crystal structure, a bonding layer formed between the thermal conduction layer and the SiC layer, and a nitride semiconductor layer formed on one principal surface of the SiC layer.

A GaN epitaxial substrate contains a GaN substrate and a GaN buffer layer epitaxially grown on the GaN substrate. The GaN epitaxial substrate includes a point A and a point B which is positioned on a straight line parallel to a [0001] axis passing through the point A, the point B being present in a [0001] axis direction relative to the point A, the point A is present in the GaN substrate or the GaN buffer layer, the point B is present in the GaN buffer layer, a ratio ([Fe].sub.B/[Fe].sub.A) is 1/100, [Fe].sub.A being a Fe concentration of the point A and [Fe].sub.B being a Fe concentration of the point B, and a distance between the point A and the point B is 0.2 m or less.