A semiconductor device having a high degree of integration is provided. A first and second transistors which are electrically connected to each other and a first insulating layer are included. The first transistor includes a first semiconductor layer, a second insulating layer, and a first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and a fourth to sixth conductive layers. The first insulating layer is positioned over the first conductive layer and includes an opening reaching the first conductive layer. The second conductive layer is positioned over the first insulating layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The third conductive layer is positioned over the second insulating layer to overlap with the inner wall of the opening. The third insulating layer is positioned over the fourth conductive layer. The fifth and sixth conductive layers are positioned over the fourth conductive layer with the third insulating layer therebetween. The second semiconductor layer is in contact with top surfaces of the fifth and sixth conductive layers, side surfaces thereof that face each other, and a top surface of the third insulating layer sandwiched between the fifth conductive layer and the sixth conductive layer.

According to one embodiment, a method of manufacturing a semiconductor device, includes forming a first insulating layer, an oxide semiconductor layer, a second insulating layer, a buffer layer and a metal layer sequentially on a base, forming a patterned resist on the metal layer, etching the buffer layer and the metal layer using the resist as a mask to expose an upper surface of the second insulating layer, reducing a volume of the resist to expose an upper surface along a side surface of the metal layer, etching the metal layer using the resist as a mask, to form a gate electrode and to expose an upper surface of the buffer layer, and carrying out ion implantation on the oxide semiconductor layer using the gate electrode as a mask.

A radio frequency device includes an optically transparent, electrically insulating substrate; a plurality of optically transparent, electrically conductive cells disposed on the substrate; a thin film transistor electrically coupled between an optically transparent electrode of a first one of the cells and an optically transparent electrode of a second one of the cells; and an optically transparent conductive control trace electrically coupled to a control terminal of the transistor. In an example, at least one of the cells is a transparent conductive oxide thin film. Electrodes of the transistor may also be optically transparent.

In one embodiment, a negative capacitance transistor device includes a perovskite semiconductor material layer with first and second perovskite conductors on opposite ends of the perovskite semiconductor material layer. The device further includes a dielectric material layer on the perovskite semiconductor material layer between the first and second perovskite conductors, a perovskite ferroelectric material layer on the dielectric material layer, and a third perovskite conductor on the perovskite ferroelectric material layer.

Perovskite oxide field effect transistors comprise perovskite oxide materials for the channel, source, drain, and gate oxide regions. The source and drain regions are doped with a higher concentration of n-type or p-type dopants (depending on whether the transistor is an n-type or p-type transistor) than the dopant concentration in the channel region to minimize Schottky barrier height between the source and drain regions and the source and drain metal contact and contact resistance.

Related to the field of display panels, an array substrate, a manufacturing method thereof, and a display panel. The array substrate includes: the base substrate, the buffer layer, the active layer, the gate insulation layer, the gate, the interlayer insulation layer, the source, and the drain, which are stacked together. By using the gate insulation layer as a conductive mask of the active layer, and by adjusting the width of the gate and the width of the gate insulation layer, a width difference between the channel region and the gate is within the preset range, which reduces the problem of excessive width difference caused by the diffusion phenomenon of the channel region, and can at the same time meet the switching characteristics requirements of the thin film transistor and the definition requirements of the display panel.

A semiconductor device includes an oxide semiconductor layer, a first electrode and a second electrode, which are arranged apart from each other on the oxide semiconductor layer, a metal oxide layer arranged between the oxide semiconductor layer and at least one of the first electrode and the second electrode, and a metal nitride layer arranged between the metal oxide layer and the oxide semiconductor layer.

A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.

To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.

An object is to provide a semiconductor device having electrical characteristics such as high withstand voltage, low reverse saturation current, and high on-state current. In particular, an object is to provide a power diode and a rectifier which include non-linear elements. An embodiment of the present invention is a semiconductor device including a first electrode, a gate insulating layer covering the first electrode, an oxide semiconductor layer in contact with the gate insulating layer and overlapping with the first electrode, a pair of second electrodes covering end portions of the oxide semiconductor layer, an insulating layer covering the pair of second electrodes and the oxide semiconductor layer, and a third electrode in contact with the insulating layer and between the pair of second electrodes. The pair of second electrodes are in contact with end surfaces of the oxide semiconductor layer.