Patent classifications
H10D30/877
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes: a semiconductor substrate; a semiconductor layer on the semiconductor substrate; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a gate electrode on the semiconductor layer between the source electrode and the drain electrode; and an insulating film covering the semiconductor layer, the source electrode, the drain electrode and the gate electrode, the gate electrode has an eaves structure including a lower electrode joined to the semiconductor layer and an upper electrode provided on the lower electrode and wider than the lower electrode, a principal ingredient of the insulating film is an oxide film where atomic layers are alternately arrayed for each monolayer, and a film thickness of the insulating film that covers the lower electrode of the gate electrode is equal to a film thickness of the insulating film that covers the upper electrode.
Trench Vertical JFET With Ladder Termination
A vertical JFET with a ladder termination may be made by a method using a limited number of masks. A first mask is used to form mesas and trenches in active cell and termination regions simultaneously. A mask-less self-aligned process is used to form silicide source and gate contacts. A second mask is used to open windows to the contacts. A third mask is used to pattern overlay metallization. An optional fourth mask is used to pattern passivation. Optionally the channel may be doped via angled implantation, and the width of the trenches and mesas in the active cell region may be varied from those in the termination region.
Semiconductor device with improved field plate
A transistor device includes a semiconductor body, a spacer layer, and a field plate. The spacer layer is over at least a portion of a surface of the semiconductor body. The field plate is over at least a portion of the spacer layer, and includes a semiconductor layer between a first refractory metal interposer layer and a second refractory metal interposer layer. By including the semiconductor layer between the first refractory metal interposer layer and the second refractory metal interposer layer, the electromigration of metals in the field plate is significantly reduced. Since electromigration of metals in the field plate is a common cause of transistor device failures, reducing the electromigration of metals in the field plate improves the reliability and lifetime of the transistor device.
Semiconductor device with improved field plate
A transistor device includes a semiconductor body, a spacer layer, and a field plate. The spacer layer is over at least a portion of a surface of the semiconductor body. The field plate is over at least a portion of the spacer layer, and includes a first current carrying layer, a refractory metal interposer layer over the first current carrying layer, and a second current carrying layer over the refractory metal interposer layer. By including the refractory metal interposer layer between the first current carrying layer and the second current carrying layer, the electromigration of metals in the field plate is significantly reduced. Since electromigration of metals in the field plate is a common cause of transistor device failures, reducing the electromigration of metals in the field plate improves the reliability and lifetime of the transistor device.
DUAL-STAGE SCHOTTKY BARRIER AND METHOD
A semiconductor device includes a dual-stage Schottky barrier. The dual-stage Schottky barrier includes a first stage and a second stage. The first stage is formed over a substrate stack and includes an upper layer having a length corresponding to a gate length for the device. The second stage is formed at least partially over the first stage and includes a contact segment having a length less than the gate length.