Patent classifications
H10D48/01
METHOD FOR MAKING ITO PEROVSKITE SOLAR CELLS
The perovskite solar cell (PSC) includes a first layer containing a conducting material coated glass plate as a substrate, a second layer containing copper doped nickel oxide, a third layer containing a perovskite, a fourth layer containing nitrogen (N)-doped graphene quantum dots, a fifth layer containing phenyl-C61-butyric acid methyl ester and a top layer including conductive layer. A method for producing the perovskite solar cell is also discussed.
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a semiconductor substrate having an element region and a terminal region located around the element region. The terminal region includes multiple guard rings and multiple first diffusion regions. When the semiconductor substrate is viewed in a plan view, one of the first diffusion regions is arranged correspondingly to one of the guard rings, and each of the guard rings is located in corresponding one of the first diffusion regions. A width of each of the first diffusion regions is larger than a width of corresponding one of the guard rings.
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a semiconductor substrate having an element region and a terminal region located around the element region. The terminal region includes multiple guard rings and multiple first diffusion regions. When the semiconductor substrate is viewed in a plan view, one of the first diffusion regions is arranged correspondingly to one of the guard rings, and each of the guard rings is located in corresponding one of the first diffusion regions. A width of each of the first diffusion regions is larger than a width of corresponding one of the guard rings.
Solid body and multi-component arrangement
A solid body is disclosed. The solid body includes: a detachment plane in an interior space of the solid body, the detachment plane including laser radiation-induced modifications; and a region including layers and/or components. A multi-component arrangement is also disclosed. The multi-component arrangement includes: a solid-body layer including more than 50% SiC and modifications or modification components generating pressure tensions in a region of a first surface, the modifications being amorphized components of the solid-body layer, the modifications being spaced closer to the first surface than to a second surface opposite the first surface, the first surface being essentially level; and a metal layer on the first surface of the solid-body layer.
Semiconductor device and method of formation
A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.
PHOTODETECTOR USING BANDGAP-ENGINEERED 2D MATERIALS AND METHOD OF MANUFACTURING THE SAME
A photodetector includes an insulating layer on a substrate, a first graphene layer on the insulating layer, a 2-dimensional (2D) material layer on the first graphene layer, a second graphene layer on the 2D material layer, a first electrode on the first graphene layer, and a second electrode on the second graphene layer. The 2D material layer includes a barrier layer and a light absorption layer. The barrier layer has a larger bandgap than the light absorption layer.
Metal substrate structure for a semiconductor power module
A method can be used for manufacturing a metal substrate structure for a semiconductor power module. A plurality of terminals are welded to a metal top layer. After the welding, a dielectric layer is coupled between the metal top layer and a metal bottom layer. The dielectric can be laminated or molded, as examples.
Photodetector using bandgap-engineered 2D materials and method of manufacturing the same
A photodetector includes an insulating layer on a substrate, a first graphene layer on the insulating layer, a 2-dimensional (2D) material layer on the first graphene layer, a second graphene layer on the 2D material layer, a first electrode on the first graphene layer, and a second electrode on the second graphene layer. The 2D material layer includes a barrier layer and a light absorption layer. The barrier layer has a larger bandgap than the light absorption layer.
INTEGRATED GRAPHITE-BASED STRUCTURE
A structure is provided that comprises a substrate, a plurality of elements, and a plurality of trenches disposed on the substrate. Each element is separated from adjacent elements by a trench in the plurality of trenches and has a top surface with a first and an opposing second side. A first portion of the top surface is on the first side and a second portion of the top surface is on the opposing second side. The structure further comprises a plurality of first graphene layers, each of which is formed on the first portion of the top surface of an element in the plurality of elements. The structure further comprises a plurality of second graphene layers, each of which is formed on the second portion of the top surface of a corresponding element so that each element is separately overlayed by a first graphene layer and a second graphene layer.
Stress Relieving Semiconductor Layer
A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.