A monolithically integrated semiconductor device structure includes: a substrate and a transistor; the substrate includes a transistor region; the transistor is positioned above the transistor region comprising at least one first trench and at least one second trench that are arranged in a horizontal direction and extend in a vertical direction; and the first trench is disposed below a drain of the transistor, and the second trench is disposed below a non-drain region of the transistor. In the present disclosure, the first trench and the second trench that are disposed in the substrate of the monolithically integrated semiconductor device structure, which may reduce the equivalent dielectric constant of the substrate and improve the equivalent resistivity, so that the parasitic capacitance and leakage current of the substrate below the transistor are reduced.

A semiconductor device and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a source region, a drain region, a channel region and a plurality of fins. The channel region is located between the source region and the drain region, and the fins pass through the source region, the drain region and the channel region, wherein a number of the fins located in the source region and the drain region and a number of the fins located in the channel region are not equal.

The present disclosure provides a semiconductor device and a manufacturing method thereof. The method for manufacturing a semiconductor device includes: providing a semiconductor substrate, with a plurality of trench isolation structures and a plurality of functional regions between the trench isolation structures being formed; forming a buried bit line structure, the buried bit line structure being formed in the semiconductor substrate; and forming a word line structure and a plurality of active regions, the word line structures and the active regions being formed on a surface of the semiconductor substrate and located above the functional regions.

A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.

The present disclosure provides a substrate structure, a semiconductor structure, and a method of manufacturing the substrate structures. The substrate structure includes: a base substrate, an insulation layer and a growth substrate on the base substrate in sequence; a groove provided on a side of the base substrate away from the growth substrate, where the groove penetrates at least one part of the base substrate. The present disclosure can improve the heat-dissipation performance of the substrate structure.

A power semiconductor transistor includes a semiconductor body coupled to a load terminal, a drift region, a first trench extending into the semiconductor body and including a control electrode electrically insulated from the semiconductor body by an insulator, a source region arranged laterally adjacent to a sidewall of the first trench and electrically connected to the load terminal, a channel region arranged laterally adjacent to the same trench sidewall as the source region, a second trench extending into the semiconductor body, and a guidance zone electrically connected to the load terminal and extending deeper into the semiconductor body than the first trench. The guidance zone is adjacent the opposite sidewall of the first trench as the source region and adjacent one sidewall of the second trench. In a section arranged deeper than the bottom of the first trench, the guidance zone extends laterally towards the channel region.

A lattice matched epitaxial oxide interlayer is disposed between each semiconductor layer of a graded buffer layer material stack. Each lattice matched epitaxial oxide interlayer inhibits propagation of threading dislocations from one semiconductor layer of the graded buffer layer material stack into an overlying semiconductor layer of the graded buffer layer material stack. This allows for decreasing the thickness of each semiconductor layer within the graded buffer layer material stack. The topmost semiconductor layer of the graded buffer layer material stack, which is a relaxed layer, contains a lower defect density than the other semiconductor layers of the graded buffer layer material stack.

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.

The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage V.sub.th of 0.3 V to 0.7 V and a leakage current J.sub.r of 110.sup.9 A/cm.sup.2 to 110.sup.4 A/cm.sup.2 in a rated voltage V.sub.R.

A semiconductor device includes a drift region, a dielectric film, and an anti-type doping layer. The drift region has a first type conductivity. The anti-type doping layer is located between the drift region and the dielectric film, and has a second type conductivity opposite to the first type conductivity so as to change a current path of a current in the drift region, to thereby prevent the current from being influenced by the dielectric film. A method for manufacturing a semiconductor device and a method for reducing an influence of a dielectric film are also disclosed.