Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.

Fabrication methods and gallium nitride transistors, in which an electronic device includes a substrate, a buffer structure, a hetero-epitaxy structure over the buffer structure, and a transistor over or in the hetero-epitaxy structure. In one example, the buffer structure has an extrinsically carbon doped gallium nitride layer over a dual superlattice stack or over a multilayer composition graded aluminum gallium nitride stack, and a silicon nitride cap layer over the hetero-epitaxy structure.

A method for preparing a sol-gel film is disclosed. The method comprises providing a sol-gel composition comprising one or more sol-gel film precursors and a crystallization aid, and processing the sol-gel composition by solution processing to form the sol-gel film. In certain embodiments, the sol-gel film comprises one or more metal oxides. A preferred crystallization aid includes triphenylphosphine oxide. A composition for making a sol-gel film, a sol-gel film, a device including a sol-gel film and a method for making such device are also disclosed.

A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.

Photonic integrated circuits (PICs) are based on quantum cascade (QC) structures. In embodiment methods and corresponding devices, a QC layer in a wave confinement region of an integrated multi-layer semiconductor structure capable of producing optical gain is depleted of free charge carriers to create a low-loss optical wave confinement region in a portion of the structure. Ion implantation may be used to create energetically deep trap levels to trap free charge carriers. Other embodiments include modifying a region of a passive, depleted QC structure to produce an active region capable of optical gain. Gain or loss may also be modified by partially depleting or enhancing free charge carrier density. QC lasers and amplifiers may be integrated monolithically with each other or with passive waveguides and other passive devices in a self-aligned manner. Embodiments overcome challenges of high cost, complex fabrication, and coupling loss involved with material re-growth methods.

A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).

A split electrode vertical cavity optical device includes an n-type ohmic contact layer, first through fifth ion implant regions, cathode and anode electrodes, first and second injector terminals, and p and n type modulation doped quantum well structures. The cathode electrode and the first and second ion implant regions are formed on the n-type ohmic contact layer. The third ion implant region is formed on the first ion implant region and contacts the p-type modulation doped QW structure. The fourth ion implant region encompasses the n-type modulation doped QW structure. The first and second injector terminals are formed on the third and fourth ion implant regions, respectively. The fifth ion implant region is formed above the n-type modulation doped QW structure and the anode electrode is formed above the fifth ion implant region.

A semiconductor device includes an n-type ohmic contact layer, cathode and anode electrodes, p-type and n-type modulation doped quantum well (QW) structures, and first and second ion implant regions. The anode electrode is formed on the first ion implant region that contacts the p-type modulation doped QW structure and the cathode electrode is formed by patterning the first and second ion implant regions and the n-type ohmic contact layer. The semiconductor device is configured to operate as at least one of a diode laser and a diode detector. As the diode laser, the semiconductor device emits photons. As the diode detector, the semiconductor device receives an input optical light and generates a photocurrent.

A device including one or more layers with lateral regions configured to facilitate the transmission of radiation through the layer and lateral regions configured to facilitate current flow through the layer is provided. The layer can comprise a short period superlattice, which includes barriers alternating with wells. In this case, the barriers can include both transparent regions, which are configured to reduce an amount of radiation that is absorbed in the layer, and higher conductive regions, which are configured to keep the voltage drop across the layer within a desired range.

A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.