A semiconductor device includes a substrate, a first dielectric layer, a channel layer and source/drain electrodes. The first dielectric layer is over the substrate. The channel layer is over the first dielectric layer. Source/drain electrodes are over the channel layer. The source/drain electrodes comprise a 2D semimetal material. The channel layer comprises a 2D semiconductor material interfacing the 2D semimetal material of the source/drain electrodes.

A semiconductor device includes a sensing element including a sensing electrode and a filter covering the sensing electrode. The filter includes a first work function layer and a second work function layer. The first work function layer is over the sensing electrode. The second work function layer is over the first work function layer. A work function value of the second work function layer is greater than a work function value of the first work function layer, and an atomic percentage of metal in the second work function layer is greater than an atomic percentage of metal in the first work function layer.

An integrated circuit device includes a Janus transition metal dichalcogenide layer, a first gate structure, and a second gate structure. The Janus transition metal dichalcogenide layer has opposite first and second sides. The first gate structure is on the first side of the Janus transition metal dichalcogenide layer. A second gate structure is on the second side of the Janus transition metal dichalcogenide layer.

A two-dimensional (2D) heterojunction interlayer tunneling field effect transistor (Thin-TFET) allows for particle tunneling in a vertical stack comprising monolayers of two-dimensional semiconductors separated by an interlayer. In some examples, the two 2D materials may be misaligned so as to influence the magnitude of the tunneling current, but have a modest impact on gate voltage dependence. The Thin-TFET can achieve very steep subthreshold swing, whose lower limit is ultimately set by the band tails in the energy gaps of the 2D materials produced by energy broadening. These qualities in turn make the Thin-TFET an ideal low voltage, low energy solid state electronic switch.

A low strain transfer protective layer is formed on a transition metal dichalcogenide (TMD) monolayer to enable the transfer of the TMD monolayer from a growth substrate to a target substrate with little or no strain-induced damage to the TMD monolayer. Transfer of a TMD monolayer from a growth substrate to a target substrate comprises two transfers, a first transfer from the growth substrate to a carrier wafer and a second transfer from the carrier wafer to the target substrate. Transfer of the TMD monolayer from the growth substrate to the carrier wafer comprises mechanically lifting off the TMD monolayer from the growth substrate. The low strain transfer protective layer can limit the amount of strain transferred from the carrier wafer to the TMD monolayer during lift-off. The carrier wafer and protective layer are separated from the TMD monolayer after attachment of the TMD monolayer to the target substrate.

Techniques and mechanisms for forming a gate dielectric structure and source or drain (S/D) structures on a monolayer channel structure of a transistor. In an embodiment, the channel structure comprises a two-dimensional (2D) layer of a transition metal dichalcogenide (TMD) material. During fabrication of the transistor structure, a layer of a dielectric material is deposited on the channel structure, wherein the dielectric material is suitable to provide a reaction, with a plasma, to produce a conductive material. While a first portion of the dielectric material is covered by a patterned structure, a second portion of the dielectric material is exposed to a plasma treatment to form a source or dielectric (S/D) electrode structure that adjoins the first portion. In another embodiment, the dielectric material is an oxide of a Group V-VI transition metal.

Integrated circuit (IC) devices and systems with backside power gates, and methods of forming the same, are disclosed herein. In one embodiment, an integrated circuit die includes a device layer with one or more transistors, a first interconnect over the device layer, a second interconnect under the device layer, and one or more power gates under the device layer.

A method includes forming a gate electrode in contact with a gate dielectric layer; forming a first 2-D material buffer layer over the gate dielectric layer; forming a 2-D material channel layer over the first 2-D material buffer layer; and forming source/drain electrodes over source/drain regions of the 2-D material channel layer.

A thin film structure according to various example embodiments includes a first buffer layer, a transition metal dichalcogenide layer on the first buffer layer, and a second buffer layer on the transition metal dichalcogenide layer, wherein the second buffer layer includes same chalcogen element as a chalcogen element included in the transition metal dichalcogenide layer.

An embodiment relates to a light-emitting element, a method for producing same, a light-emitting element package, and a lighting system. A light-emitting element according to the embodiment may comprise: a first conductive semiconductor layer (112); a second conductive semiconductor layer (116) disposed below the first conductive semiconductor layer (112); an active layer (114) disposed between the first conductive semiconductor layer (112) and the second conductive semiconductor layer (116); a plurality of holes (H) exposing parts of the first conductive semiconductor layer (112) to the bottom surface of the second conductive semiconductor layer (116) by penetrating the second conductive semiconductor layer (116) and the active layer (114); first contact electrodes (160) electrically connected to the first conductive semiconductor layer (112) from the bottom surface of the second conductive semiconductor layer (116) through the plurality of holes (H); an insulation layer (140) disposed between the first contact electrode (160) and the plurality of holes (H); a bonding layer (156) electrically connected to the first contact electrodes (160); a support member (158) disposed below the bonding layer (156); a second contact electrode (132) electrically connected to the second conductive semiconductor layer (116); and a first current-spreading semiconductor layer (191) inside the first conductive semiconductor layer (112) above the first contact electrode (160).