A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer provided over the substrate; a second nitride semiconductor layer that is on the first nitride semiconductor layer and includes a band gap larger than a band gap of the first nitride semiconductor layer; and a third nitride semiconductor layer that is on the second nitride semiconductor layer and includes a band gap larger than the band gap of the first nitride semiconductor layer. The second nitride semiconductor layer includes a damaged region in which an n-type impurity is selectively added by ion implantation. A diffusion region in which the n-type impurity is diffused is present in a vicinity of the damaged region. The nitride semiconductor device further includes: an ohmic electrode provided above the damaged region. The ohmic electrode is in ohmic contact with the diffusion region.

Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a ferroelectric structure including a channel region and a source/drain region, a gate dielectric layer disposed over the channel region of the ferroelectric structure, a gate electrode disposed on the gate dielectric layer, and a source/drain contact disposed on the source/drain region of the ferroelectric structure. The ferroelectric structure includes gallium nitride, indium nitride, or indium gallium nitride. The ferroelectric structure is doped with a dopant.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

A laminate includes a structure in which a Si (111) substrate, an oxygen-containing aluminum nitride film, and a gallium nitride film are laminated. The laminate is obtained by a production method for a laminate that is characterized by having a structure in which a Si (111) substrate, an oxygen-containing aluminum nitride film, and a gallium nitride film are laminated, the production method having: an AlN film-formation step in which an aluminum nitride film is formed on the Si (111) substrate and an Si substrate including an aluminum nitride film is obtained; an oxidation step in which the Si substrate including the aluminum nitride film is treated in an oxidizing atmosphere and a Si substrate including an oxygen-containing aluminum nitride film is obtained; and a GaN film-formation step in which a gallium nitride film is formed on the Si substrate including the oxygen-containing aluminum nitride film.

The present disclosure provides a semiconductor structure and a forming method thereof. The semiconductor structure includes: a substrate and an epitaxial layer disposed on the substrate. At least a part of the epitaxial layer is doped with metal atoms, and the doping concentration of the metal atoms at the bottom surface of the epitaxial layer near the substrate is larger than 110.sup.17 atoms/cm.sup.3.

The present disclosure provides a semiconductor structure and a forming method thereof. The semiconductor structure includes: a substrate and an epitaxial layer disposed on the substrate. At least a part of the epitaxial layer is doped with metal atoms, and the doping concentration of the metal atoms at the bottom surface of the epitaxial layer near the substrate is larger than 110.sup.17 atoms/cm.sup.3.

According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor layers, and a first insulating member. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The first electrode includes a first electrode portion. The second semiconductor layer includes first and second semiconductor portions. The third semiconductor layer includes first and second semiconductor regions. The second semiconductor region is electrically connected to the first semiconductor region and the first electrode portion. The first insulating member includes a first insulating portion. The first insulating portion is provided between the third partial region and the third electrode.

A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.

An epitaxial group-ill-nitride buffer-layer structure is provided on a heterosubstrate, wherein the buffer-layer structure has at least one stress-management layer sequence including an interlayer structure arranged between and adjacent to a first and a second group-ill-nitride layer, wherein the interlayer structure comprises a group-ill-nitride interlayer material having a larger band gap than the materials of the first and second group-ill-nitride layers, and wherein a p-type-dopant-concentration profile drops, starting from at least 11018 cm-3, by at least a factor of two in transition from the interlayer structure to the first and second group-ill-nitride layers.

Aspects of the present disclosure include fabricating integrated circuit (IC) structures using a boron etch-stop layer, and IC structures with a boron-rich region therein. Methods of forming an IC structure according to the present disclosure can include: growing a conductive epitaxial layer on an upper surface of a semiconductor element; forming a boron etch-stop layer directly on an upper surface of the conductive epitaxial layer; forming an insulator on the boron etch-stop layer; forming an opening within the insulator to expose an upper surface of the boron etch-stop layer; annealing the boron etch-stop layer to drive boron into the conductive epitaxial layer, such that the boron etch-stop layer becomes a boron-rich region; and forming a contact to the boron-rich region within the opening, such that the contact is electrically connected to the semiconductor element through at least the conductive epitaxial layer.