Patent classifications
H10D62/8603
Method for treating a semiconductor wafer
A Magnetic Czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. The semiconductor wafer is heated in a first thermal process to form radiation induced donors. Implantation energy and dose are chosen such that the semiconductor wafer has, after the first thermal process, an n-doped semiconductor region arranged between the second side and first depth, and the n-doped semiconductor region has, in the first vertical direction, a local maximum of a net doping concentration between the first depth and second side and a local minimum of the net doping concentration between the first depth and first maximum.
Method of Manufacturing a Semiconductor Device Having a Vertical Edge Termination Structure
A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.
Semiconductor device with diode
According to one embodiment, a semiconductor device includes a first and second electrode, a first, second, third and fourth semiconductor region, and a first intermediate metal film. The first region is provided above the first electrode and has a first impurity concentration. The second region is provided above the first region and has a second impurity concentration lower than the first impurity concentration. The third region is provided above the second region and has a third impurity concentration. The fourth region is provided above the second region and has a fourth impurity concentration lower than the third impurity concentration. The second electrode is provided above the third region and the fourth region and is in ohmic contact with the third region. The intermediate metal film is provided between the second electrode and the fourth region. The intermediate metal film forms Schottky junction with the fourth region.
SURFACE DOPING OF NANOSTRUCTURES
This disclosure provides systems, methods, and apparatus related to surface doping of nanostructures. In one aspect a plurality of nanostructures is fabricated with a solution-based process using a solvent. The plurality of nanostructures comprises a semiconductor. Each of the plurality of nanostructures has a surface with capping species attached to the surface. The plurality of nanostructures is mixed in the solvent with a dopant compound that includes doping species. During the mixing the capping species on the surfaces of the plurality of nanostructures are replaced by the doping species. Charge carriers are transferred between the doping species and the plurality of nanostructures.
PASSIVATED NANOPARTICLES
Passivated semiconductor nanoparticles and methods for the fabrication and use of passivated semiconductor nanoparticles is provided herein.
Semiconductor device including a vertical edge termination structure and method of manufacturing
A semiconductor device includes a semiconductor body with a first surface at a first side, a second surface opposite to the first surface and an edge surface connecting the first and second surfaces. An edge termination structure includes a glass structure and extends along the edge surface, at least from a plane coplanar with the first surface towards the second surface. A conductive structure extends parallel to the first surface and overlaps the glass structure at the first side.
Method for manufacturing semiconductor device and semiconductor device
A method for manufacturing a semiconductor device includes a step of preparing a semiconductor substrate that has a first main surface on one side and a second main surface on the other side, the semiconductor substrate on which a plurality of device forming regions and an intended cutting line that demarcates the plurality of device forming regions are set, a step of forming a first electrode that covers the first main surface in each of the device forming regions, a step of forming a second electrode that covers the second main surface, a step of partially removing the second electrode along the intended cutting line such that the semiconductor substrate is exposed, and forming a removed portion that extends along the intended cutting line, and a step of cutting the semiconductor substrate along the removed portion.
SIMULATION METHOD FOR SELECTING OPTIMAL COMPOSITION RATIO OF OXIDE SEMICONDUCTOR, AND ELECTRONIC DEVICE INCLUDING THE OXIDE SEMICONDUCTOR
The disclosure relates to a simulation method for selecting an optimal composition ratio of an oxide semiconductor. The oxide semiconductor includes at least two elements selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), tin (Sn), silver (Ag), aluminum (Al), cadmium (Cd), magnesium (Mg), antimony (Sb), silicon (Si), titanium (Ti), and zirconium (Zr); oxygen (O); and inevitable impurities. The simulation method includes setting a simulation target composition ratio set including various composition ratios of elements constituting the oxide semiconductor, checking whether the oxide semiconductor satisfies Formulas 1, 2, and 3 for each of the various composition ratios included in the simulation target composition ratio set, and selecting a composition ratio satisfying Formulas 1, 2, and 3 as an optimal composition ratio. Formulas 1, 2, and 3 may be the same as described in the specification.
Functional photoresist and method of patterning nanoparticle thin film using the same
The functional photoresist for patterning a nanoparticle thin film including nanoparticles on a substate includes: a photoactive compound (PAC); and a functional ligand that is bound to surfaces of the nanoparticles and controls physical properties of the nanoparticles.
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device includes a step of preparing a semiconductor substrate that has a first main surface on one side and a second main surface on the other side, the semiconductor substrate on which a plurality of device forming regions and an intended cutting line that demarcates the plurality of device forming regions are set, a step of forming a first electrode that covers the first main surface in each of the device forming regions, a step of forming a second electrode that covers the second main surface, a step of partially removing the second electrode along the intended cutting line such that the semiconductor substrate is exposed, and forming a removed portion that extends along the intended cutting line, and a step of cutting the semiconductor substrate along the removed portion.