A semiconductor device with a small circuit scale and reduced power consumption is provided. The semiconductor device includes first to fifth circuits. Each of the first to fourth circuits includes first and second cells, a sixth circuit, first and second current generation circuits, a first input terminal, and a second output terminal. The first circuit to the fourth circuit are electrically connected to each other in a ring, and the first circuit is electrically connected to the fifth circuit. In each of the first to fourth circuits, the first cell is electrically connected to the second cell through the first wiring, the first current generation circuit, and the third wiring, and is electrically connected to the first input terminal and the sixth circuit through the second wiring. The second cell is electrically connected to the first output terminal through the second current generation circuit. Note that the first current generation circuit functions as a current mirror circuit, and the second current generation circuit functions as an arithmetic circuit of a function system. The first cell performs an arithmetic operation of a product, and the second cell retains the result of the arithmetic operation.

Disclosed herein is a junction barrier Schottky diode that includes a semiconductor substrate, a drift layer provided on the semiconductor substrate, an anode electrode and a p-type semiconductor layer each contacting the drift layer, an n-type semiconductor layer contacting the anode electrode and the drift layer, a metal layer provided between the n-type semiconductor layer and the p-type semiconductor layer, and a cathode electrode contacting the semiconductor substrate.

A wide-band-gap diode and manufacturing method thereof are provided. The method of manufacturing a wide-band-gap diode involves growing an N-type doped epitaxial layer on an N-doped substrate. P-type ions are implanted into the epitaxial layer to form an active area, a junction termination extension region, and an edge region. The active area exhibits an axially symmetric graticule pattern, with higher doping area density towards the center of the active area. The junction termination extension region surrounds the active area, and the edge region encircles both of the active area and the junction termination extension region to enhance the wide-band-gap diode's capability to withstand surge currents.

A semiconductor device that can be scaled down or highly integrated is to be provided. The semiconductor device includes a first conductor, a second conductor, a first insulator, a first transistor over the first insulator, and a second insulator over the first transistor. The first transistor includes a first metal oxide, a third conductor and a fourth conductor electrically connected to the first metal oxide, a third insulator over the first metal oxide, and a fifth conductor over the third insulator. The top surface of the fifth conductor includes a region in contact with the second insulator. The first conductor includes a portion positioned on an inner side of an opening of the first insulator, a region in contact with the side surface of the third conductor, and a portion positioned on an inner side of an opening of the second insulator. The second conductor includes a region in contact with the top surface of the fourth conductor, and a portion positioned on an inner side of an opening of the second insulator. The top surface of the first conductor is level or substantially level with the top surface of the second conductor.

Provided a semiconductor device including: a semiconductor layer with an extended depletion layer; and an electrode disposed on the semiconductor layer directly or via another layer, the semiconductor layer including a first region containing, as a major component, a crystalline oxide semiconductor containing gallium, and a second region containing, as a major component, an oxide containing gallium, the second region including a linear crystal defect region in a cross section perpendicular to an upper surface of the semiconductor layer.

Provided a semiconductor device including: a semiconductor layer; and an electrode disposed on the semiconductor layer directly or via another layer, the semiconductor layer including a first region containing, as a major component, a crystalline oxide semiconductor containing gallium, and a second region containing, as a major component, an oxide containing gallium, the second region and the first region each containing an impurity element, a maximum value of a concentration of the impurity element in the second region being located at a depth of 1.0 m or more from an upper surface of the semiconductor layer and being greater than a maximum value of a concentration of the impurity element in the first region.

A crystalline oxide film containing gallium as a main component, in which when CuK rays are made incident on the crystalline oxide film to perform X-ray diffraction, a reflection output in scanning and 2 has a local maximum point when 16.20<2<39.90 and 20.30<<32.20 at an angle around a axis orthogonal to a surface of the crystalline oxide film at the angle where a peak attributable to the crystalline oxide film by -2 measurement is maximum, and 40.10<+<40.40 relative to and at which the reflection output reaches a maximum is satisfied. This provides the crystalline oxide film, a laminated structure, a semiconductor device with excellent semiconductor properties, particularly excellent withstand voltage, and a method for producing a crystalline oxide film.

Provided is a crystalline oxide thin film including In as a main component, wherein 50% or more of Fourier transform images obtained by subjecting each of lattice images in a plurality of image regions extracted from a transmission electron microscope (TEM) image of a cross-section of the crystalline oxide thin film to two-dimensional Fourier transform (FFT) processing exhibit any one of plane orientations selected from (100), (110), (111), (211), (411), (125), (210), (310), and (320).

The invention relates to a device comprising transistors (T1, T2, T3), each comprising: a channel (41) with the basis of a semiconductive material, a gate-all-around (50), totally surrounding said channel (41), a source (42) and a drain (43) on either side of the channel (41), and source and drain contacts (60S, 60, 60D), a gate dielectric layer (30) separating the channel (41) and the gate-all-around (50), spacers (70) on either side of the gate (50). Advantageously, the gate dielectric layer (30) and the spacers (70) are formed by at least one single and same continuous layer (73) surrounding the gate-all-around (50). The invention also relates to a method for producing such a device.

An oxide semiconductor film includes indium (In) and a first metal element selected from a group consisting of aluminum (Al), gallium (Ga), yttrium (Y), scandium (Sc), and lanthanoid elements. The oxide semiconductor film includes a plurality of crystal grains and a grain boundary having a crystal orientation difference greater than 5 degrees between two adjacent measurement points obtained by an EBSD (electron backscatter diffraction) method. An average KAM value calculated by the EBSD method is greater than or equal to 1.0 degree.