A hetero-junction bipolar transistor includes an n-type collector layer made of InGaN, a base layer formed on the collector layer and made of GaN, and an emitter layer formed on the base layer and made of a nitride semiconductor containing Al, in which the collector layer, the base layer, and the emitter layer are formed in a state in which the principal surface is a group V polar plane. The base electrode can be formed in contact with the upper part of the base layer around the emitter layer formed in a mesa shape.

There is provided a semiconductor device including: a drift region of a first conductivity type disposed in a semiconductor substrate; a base region of a second conductivity type disposed above the drift region; an emitter region of the first conductivity type disposed above the base region; a plurality of trench portions arrayed in a predetermined array direction on a front surface side of the semiconductor substrate; a trench contact disposed on the front surface side of the semiconductor substrate between two adjacent trench portions; and a contact layer of the second conductivity type disposed under the trench contact and having a higher doping concentration than the base region, wherein a lower end of the trench contact is deeper than a lower end of the emitter region, and the emitter region and the contact layer are in contact with each other at a side wall of the trench contact.

A semiconductor device includes a chip that has a first main surface on one side and a second main surface on the other side, an IGBT region provided in an inner portion of the first main surface, an outer peripheral region provided in a peripheral edge portion of the first main surface, a first conductivity type well region formed in a surface layer portion of the first main surface in the outer peripheral region so as to define the IGBT region, an insulating film that covers the well region, a well connection electrode embedded in the insulating film so as to be connected to the well region, and a second conductivity type cathode region formed in a surface layer portion of the second main surface in the outer peripheral region so as to oppose the well connection electrode, and that forms a diode with the well region.

There is provided a semiconductor device including: a pad portion that is provided above the upper surface of the semiconductor substrate and that is separated from the emitter electrode; a wire wiring portion that is connected to a connection region on an upper surface of the pad portion; a wiring layer that is provided between the semiconductor substrate and the pad portion and that includes a region overlapping the connection region; an interlayer dielectric film that is provided between the wiring layer and the pad portion and that has a through hole below the connection region; a tungsten portion that contains tungsten and that is provided inside the through hole and electrically connects the wiring layer and the pad portion; and a barrier metal layer that contains titanium and that is provided to cover an upper surface of the interlayer dielectric film below the connection region.

A semiconductor device is provided. The semiconductor includes at least one of a well area in a substrate and having a first conductivity-type; impurity-implanted areas in the well, and having a second conductivity-type different from the first conductivity-type and arranged in a first direction, a first fin structure on the impurity-implanted area and having the second conductivity-type, wherein the first fin structure includes first semiconductor patterns and first sacrificial patterns alternately stacked; a first contact on the first fin structure; a first epitaxial pattern on the well area and having the first conductivity-type; and a second contact on the first epitaxial pattern.

Provided is a semiconductor device, wherein a straight line extending from an end portion E1 in the extending direction of a contact hole for electrically connecting an emitter electrode and a front surface of a semiconductor substrate toward a back surface of the semiconductor substrate is defined as a first perpendicular line, a straight line forming a predetermined angle 1 with respect to the first perpendicular line and passing through the end portion E1 in the extending direction of the contact hole is defined as a first straight line, a position where the first straight line intersects a back surface of the semiconductor substrate is defined as a position M1, and the position M1 is located on an outer side of a cathode region in the extending direction.

Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an intrinsic base including a first semiconductor layer, a collector including a second semiconductor layer, and an emitter including a third semiconductor layer. The first semiconductor layer, which comprises silicon-germanium, includes a first portion and a second portion adjacent to the first portion. The second semiconductor layer includes a portion on the first portion of the first semiconductor layer, and the third semiconductor layer includes a portion on the second portion of the first semiconductor layer. The structure further comprises a dielectric spacer laterally between the portion of the second semiconductor layer and the portion of the third semiconductor layer.

Bipolar junction transistor (BJT) structures are provided. A BJT structure includes a semiconductor substrate, a collector region formed in the semiconductor substrate, a base region formed over the collector region, an emitter region formed over the collector region, a ring-shaped shallow trench isolation (STI) region formed in the collector region, and a base dielectric layer formed over the collector region and on opposite sides of the base region. The base dielectric layer is surrounded by an inner side wall of the ring-shaped STI region.

There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.

An HBT includes a semiconductor substrate having first and second principal surfaces opposite each other; and a collector layer, a base layer, and an emitter layer stacked in this order on the first principal surface side of the semiconductor substrate. The collector layer includes a first semiconductor layer with metal particles dispersed therein, the metal particles each formed by a plurality of metal atoms bonded with each other.