A super-semiconductor (SSC), semiconductor devices including the SSC, and methods for making the SSC. The SSC includes a bimetallic nanostructured array having a substrate and a nanoshell array disposed on the substrate. The nanoshell array is defined by a plurality of non-close-packed, non-conductive, core bodies disposed on the substrate, a first metal layer disposed on the non-conductive core bodies and on the substrate in areas located between adjacent non-conductive core-bodies, and at least a second metal layer disposed on the first metal layer, wherein the second metal is different than the first metal. The bimetallic nanostructured array exhibits p-type or n-type metal conductivity above a transition temperature, and in embodiments, exhibits resistivity in a range of 10.sup.8-10.sup.7 ohm*m at a temperature of 300K+/40K.

A super-semiconductor (SSC), semiconductor devices including the SSC, and methods for making the SSC. The SSC includes a bimetallic nanostructured array having a substrate and a nanoshell array disposed on the substrate. The nanoshell array is defined by a plurality of non-close-packed, non-conductive, core bodies disposed on the substrate, a first metal layer disposed on the non-conductive core bodies and on the substrate in areas located between adjacent non-conductive core-bodies, and at least a second metal layer disposed on the first metal layer, wherein the second metal is different than the first metal. The bimetallic nanostructured array exhibits p-type or n-type metal conductivity above a transition temperature, and in embodiments, exhibits resistivity in a range of 10.sup.8-10.sup.7 ohm*m at a temperature of 300K+/40K.

A super-semiconductor (SSC), semiconductor devices including the SSC, and methods for making the SSC. The SSC includes a bimetallic nanostructured array having a substrate and a nanoshell array disposed on the substrate. The nanoshell array is defined by a plurality of non-close-packed, non-conductive, core bodies disposed on the substrate, a first metal layer disposed on the non-conductive core bodies and on the substrate in areas located between adjacent non-conductive core-bodies, and at least a second metal layer disposed on the first metal layer, wherein the second metal is different than the first metal. The bimetallic nanostructured array exhibits p-type or n-type metal conductivity above a transition temperature, and in embodiments, exhibits resistivity in a range of 10.sup.8-10.sup.7 ohm*m at a temperature of 300K+/40K.

A super-semiconductor (SSC), semiconductor devices including the SSC, and methods for making the SSC. The SSC includes a bimetallic nanostructured array having a substrate and a nanoshell array disposed on the substrate. The nanoshell array is defined by a plurality of non-close-packed, non-conductive, core bodies disposed on the substrate, a first metal layer disposed on the non-conductive core bodies and on the substrate in areas located between adjacent non-conductive core-bodies, and at least a second metal layer disposed on the first metal layer, wherein the second metal is different than the first metal. The bimetallic nanostructured array exhibits p-type or n-type metal conductivity above a transition temperature, and in embodiments, exhibits resistivity in a range of 10.sup.8-10.sup.7 ohm*m at a temperature of 300K+/40K.