Some embodiments of the present disclosure provide an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes a lower metal capacitor electrode, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal capacitor electrode from the upper metal capacitor electrode. The capacitor dielectric is made up of an amorphous oxide/nitride matrix and a plurality of metal or metal oxide/nitride nano-particles that are randomly distributed over the volume of amorphous oxide/nitride matrix.

An electronic device, includes: a graphene nanoribbon having a first graphene and a second graphene; a first electrode coupled to the first graphene; and a second electrode coupled to the second graphene, wherein the first graphene is terminated on an edge by a first terminal group and has a first polarity and the second graphene is terminated on an edge by a second terminal group different to the first terminal group and has a second polarity different from the first polarity.

A scalable voltage source having a number N of partial voltage sources implemented as semiconductor diodes connected to one another in series, wherein each of the partial voltage sources has a semiconductor diode with a p-n junction. A tunnel diode is formed between sequential pairs of partial voltage sources, wherein the tunnel diode has multiple semiconductor layers with a larger band gap than the band gap of the p/n absorption layers and the semiconductor layers with the larger band gap are each made of a material with modified stoichiometry and/or a different elemental composition than the p/n absorption layers of the semiconductor diode. The partial voltage sources and the tunnel diodes are monolithically integrated together, and jointly form a first stack with a top and a bottom, and the number N of partial voltage sources is greater than or equal to two.

A highly doped layer for interconnecting tunnel junctions in multijunction solar cells is presented. The highly doped layer is a delta doped layer in one or both layers of a tunnel diode junction used to connect two or more p-on-n or n-on-p solar cells in a multijunction solar cell. A delta doped layer is made by interrupting the epitaxial growth of one of the layers of the tunnel diode, depositing a delta dopant at a concentration substantially greater than the concentration used in growing the layer of the tunnel diode, and then continuing to epitaxially grow the remaining tunnel diode.

A power semiconductor device includes a first contact, a second contact, and a semiconductor volume disposed between the first contact and the second contact. The semiconductor volume includes an n-doped field stop layer configured to spatially delimit an electric field that in the semiconductor volume during operation of the power semiconductor device, a heavily p-doped zone and a neighboring heavily n-doped zone, which together form a tunnel diode. The tunnel diode is located in the vicinity of, or adjacent to, or within the field stop layer. The tunnel diode is configured to provide protection against damage to the device due to a rise of an electron flow in an abnormal operating condition, by the fast provision of holes. Further, a method for producing such devices is provided.

In one embodiment, a device includes a substrate having a top surface and cavity that defines generally vertical walls, a thin film of material that has been deposited on the walls of the cavity, and a further material that fills the cavity, wherein a top edge of the thin film is exposed and forms a trace that is flush with the top surface of the substrate and has substrate material on one side and the further material on the other side.

Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.

Tunnel field effect devices and methods of fabricating tunnel field effect devices are described. In one embodiment, the semiconductor device includes a first drain region of a first conductivity type disposed in a first region of a substrate, a first source region of a second conductivity type disposed in the substrate, the second conductivity type being opposite the first conductivity type, a first channel region electrically coupled between the first source region and the first drain region, the first source region underlying a least a portion of the first channel region, and a first gate stack overlying the first channel region.

A semiconductor device includes a substrate, a two-dimensional (2D) material layer formed on the substrate and having a first region and a second region adjacent to the first region, and a source electrode and a drain electrode provided to be respectively in contact with the first region and the second region of the 2D material layer, the second region of the 2D material layer including an oxygen adsorption material layer in which oxygen is adsorbed on a surface of the second region.

Some embodiments of the present disclosure provide an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes a lower metal capacitor electrode, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal capacitor electrode from the upper metal capacitor electrode. The capacitor dielectric is made up of an amorphous oxide/nitride matrix and a plurality of metal or metal oxide/nitride nano-particles that are randomly distributed over the volume of amorphous oxide/nitride matrix.