Patent classifications
H10D84/161
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE
Provided is a semiconductor device, including: a semiconductor substrate including an active portion provided with a transistor portion; an emitter electrode provided above a front surface of the semiconductor substrate; and a protective film provided above the emitter electrode, where the active portion includes: an emitter region of a first conductivity type provided on the front surface of the semiconductor substrate; a contact region of a second conductivity type; and a plurality of trench portions, where the emitter electrode includes an exposed portion not covered by the protective film, and where the active portion includes: in a region in which the exposed portion is provided, a first region; and a second region provided at an outer circumference of the first region and having a channel density lower than that of the first region.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a semiconductor device having a semiconductor substrate with the oxygen chemical concentration of 110.sup.16 atoms/cm.sup.3 or more, wherein it includes the bulk donor and an increased donor, includes a buffer region of a first conductivity type that has a doping concentration higher than that of the drift region, and has a concentration of the thermal donor that is 10% or less of a concentration of the increased donor at a same depth position throughout an entire first range from a lower end of the buffer region to the deepest peak.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
Provided is a semiconductor device, comprising a semiconductor substrate with an upper surface and a lower surface, wherein: the semiconductor substrate has one or more hydrogen peaks, which are peaks of hydrogen chemical concentration, in a depth direction, and the one or more hydrogen peaks include a deepest peak furthest away from the lower surface of the semiconductor substrate; the semiconductor substrate has a lower region from the lower surface to the deepest peak, and an upper region arranged from the deepest peak to the upper surface; and for at least one of a carbon chemical concentration or an oxygen chemical concentration, a concentration in the lower region is twice or more of a concentration of the upper region.
SEMICONDUCTOR DEVICE
In a semiconductor device, a semiconductor element includes a semiconductor substrate and an upper electrode on a first surface of the semiconductor substrate. The semiconductor substrate has an IGBT region and a diode region. An upper conductor is disposed to face the upper electrode. An upper solder is interposed between the upper electrode and the upper conductor. An alloy layer is interposed between the upper electrode and the upper solder. The upper electrode includes an Al electrode disposed on the first surface and an Ni electrode disposed on the Al electrode. The upper solder contains Cu and Sn. The alloy layer contains Ni, Cu, and Sn. At least in a region overlapping with the diode region in a plan view along a thickness direction of the semiconductor substrate, a grain size of the upper solder is smaller on the semiconductor element side than on the upper conductor side.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device, including a transistor portion and a diode portion arranged side by side, wherein the transistor portion has a first contact portion where a first mesa portion among a plurality of mesa portions contacts a metal electrode, a second contact portion where a second mesa portion arranged away from the diode portion further than the first mesa portion among the plurality of mesa portions contacts a metal electrode; wherein a lower end of the second contact portion is arranged above a lower end of the first contact portion.
REVERSE CONDUCTING IGBT POWER DEVICE AND PREPARATION METHOD THEREFOR, AND ELECTRONIC DEVICE
A reverse conducting insulated gate bipolar transistor (IGBT) power device includes at least one cell. The cell includes: an electric field region of a first conductivity type, a front structure disposed on a front side of the electric field region, and a collector structure disposed on a back side of the electric field region. The collector structure includes: a first collector layer of the first conductivity type; a second collector layer of a second conductivity type; a collector insertion layer; a collector interconnection portion; and a collector. The second collector layer and the first collector layer are disposed on a lower surface of the electric field region and connected to the collector, the second collector layer is in contact with the first collector layer, and the collector insertion layer is disposed in the electric field region and connected to the second collector layer by the collector interconnection portion.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device including a transistor portion and a diode portion arranged side by side with the transistor unit in a first direction, including a first mesa portion and a second mesa portion arranged farther away from the diode portion than the first mesa portion, wherein: the first mesa portion has a first region of the first conductivity type, provided in at least a partial region between a depth position of a lower end of the base region and a depth position of a lower end of the trench portion; and the second mesa portion has a second region of the first conductivity type, provided in at least a partial region between the depth position of the lower end of the base region and a depth position of the lower end of the trench portion, with a dose amount greater than that of the first region.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device comprising a diode portion that is arranged side by side with a transistor portion, wherein the transistor portion includes: a first contact portion in which a first mesa portion among a plurality of mesa portions and a metal electrode are in contact with each other; and a second contact portion in which a second mesa portion among the plurality of mesa portions, which is arranged further apart from the diode portion than the first mesa portion, and the metal electrode is in contact with each other, and a lower end of the first contact portion is arranged above a lower end of the second contact portion.
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRIC POWER CONVERTER
To provide a semiconductor device, a method for manufacturing a semiconductor device, and an electric power converter realizing prevention of rise of on-voltage in an IGBT and improvement of a reverse recovery characteristic of a diode part by a simpler process. In the semiconductor device 100 (RC-IGBT), in the RC-IGBT having an IGBT part and a diode part in a single chip, a body layer 11 of the diode part is formed shallower than a body layer 10 of the IGBT part, a lifetime control layer 8 of the IGBT part is formed in the body layer 10 of the IGBT part, and the lifetime control layer 8 of the diode part is formed in a drift layer 4 below the body layer 11 of the diode part.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided is a semiconductor device including a transistor portion, where the semiconductor device includes: a plurality of trench portions; a drift region of a first conductivity type provided in a semiconductor substrate; a base region of a second conductivity type provided above the drift region; an emitter region of the first conductivity type provided above the base region; a first accumulation region of the first conductivity type provided below the base region; a trench bottom region of the second conductivity type provided below the first accumulation region; and a second accumulation region of the first conductivity type provided at a position deeper than that of the trench bottom region in a depth direction of the semiconductor substrate and having a higher doping concentration than the drift region, where the transistor portion includes a collector region of the second conductivity type on a back surface of the semiconductor substrate.