An electronic device includes a resistor with a drift region having majority carrier dopants of a first conductivity type and resistor terminals including first and second implanted wells with majority carrier dopants of the first conductivity type along laterally opposite sides of the drift region in a semiconductor layer, and a diode integrated with the resistor and including majority carrier dopants of a second conductivity type in the semiconductor layer adjacent one of the first and second implanted wells to limit a voltage across the resistor.

An electronic device including a thermistor and a bias reference resistor in a voltage divider configuration integrated into a single die and a method of fabricating the same. In an example, the electronic device comprises a substrate including an n-well region, a thermistor formed in the n-well region, and a bias resistor connected in series to the thermistor, the bias resistor formed in a region of the substrate isolated from the n-well region.

A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. The chip resistor is arranged to have a resistor network on a substrate. The resistor network includes a plurality of resistor bodies arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films and fuse films. By selectively fusing a fuse film, a resistance unit can be electrically incorporated into the resistor network or electrically separated from the resistor network to make the resistance value of the resistor network the required resistance value.

A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.

An electrostatic discharge protection device includes first and second diodes series-connected between first and second connection terminals. A third connection terminal is coupled to a junction of the first and second diodes. A capacitor is connected in parallel with the first and second diodes between the first and second terminals.

A chip capacitor according to the present invention includes a substrate, a pair of external electrodes formed on the substrate, a capacitor element connected between the pair of external electrodes, and a bidirectional diode connected between the pair of external electrodes and in parallel to the capacitor element. Also, a circuit assembly according to the present invention includes the chip capacitor according to the present invention and a mounting substrate having lands, soldered to the external electrodes, on a mounting surface facing a front surface of the substrate.

A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.

In accordance with an embodiment, a semiconductor component, includes a common mode filter monolithically integrated with a protection device. The common mode filter includes a plurality of coils and the protection device has a terminal coupled to a first coil and another terminal coupled to a second coil.

A semiconductor device has a substrate and RF FEM formed over the substrate. The RF FEM includes an LC low-pass filter having an input coupled for receiving a transmit signal. A Tx/Rx switch has a first terminal coupled to an output of the LC filter. A diplexer has a first terminal coupled to a second terminal of the Tx/Rx switch and a second terminal for providing an RF signal. An IPD band-pass filter has an input coupled to a third terminal of the Tx/Rx switch and an output providing a receive signal. The LC filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The IPD filter includes conductive traces wound to exhibit inductive and mutual inductive properties and capacitors coupled to the conductive traces. The RF FEM substrate can be stacked over a semiconductor package containing an RF transceiver.

Electrostatic Discharge (ESD) protection using lateral surface Schottky diodes is disclosed. In one embodiment, a Metal-Insulator-Metal (MIM) capacitor with ESD protection comprises a group III-V substrate, a first metal layer contacting the substrate, an insulation layer formed over the first metal layer, and a second metal layer formed over the insulation layer and also contacting the substrate. A MIM capacitor is formed by overlapping portions of the first metal layer, the insulation layer, and the second metal layer. First and second Schottky diodes are formed where the first and second metal layers, respectively, contact the substrate, such that the cathodes of the Schottky diodes are electrically connected to one another and the anodes of the Schottky diodes are electrically connected to the respective overlapping portions of the first and second metal layers.