A complementary metal-oxide-semiconductor depth sensor element comprises a photogate formed in a photosensitive area on a substrate. A first transfer gate and a second transfer gate are formed respectively on two sides of the photogate in intervals. A first floating doped area and a second floating doped area are formed respectively on the outer sides of the first transfer gate and the second transfer gate. The first and second floating doped regions have dopants of a first polarity and the semiconductor area has dopants of a second polarity opposite to the first polarity. Since the photogate and at least parts of the first and second transfer gates connect to the same semiconductor area and no other dopants of polarity opposite to the second polarity. Therefore, the majority carriers from the photogate excited by lights drift, but not diffuse, to transfer to the first and second transfer gates.

A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV signal is above a highest voltage of a power supply. The erasing also includes applying the first HV signal to a local bit line (BL).

An apparatus and method, the apparatus comprising: at least one charged substrate (3); a channel of two dimensional material (5); and at least one floating electrode (7A-C) wherein the floating electrode comprises a first area (10A-C) adjacent the at least one charged substrate, a second area (11A-C) adjacent the channel of two dimensional material and a conductive interconnection (9A-C) between the first area and the second area wherein the first area is larger than the second area and wherein the at least one floating electrode is arranged to control the level of doping within the channel of two dimensional material.

A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV signal is above a highest voltage of a power supply. The erasing also includes applying the first HV signal to a local bit line (BL).

A vertically stacked heterostructure device includes: (1) a substrate; and (2) vertically stacked layers disposed over the substrate and including (a) a source electrode including a layer of graphene; (b) a drain electrode; and (c) a semiconducting channel disposed between the source electrode and the drain electrode. During operation of the device, a current is configured to flow between the source electrode and the drain electrode through the semiconducting channel.

A photodetector including a photoelectric conversion structure made of a semiconductor material and, on a light-receiving surface of the conversion structure, a stack of first and second diffractive elements, the second element being above the first element, wherein: the first element includes at least one pad made of a material having an optical index n1, laterally surrounded with a region made of a material having an optical index n2 different from n1; the second element includes at least one pad made of a material having an optical index n3, laterally surrounded with a region made of a material having an optical index n4 different from n3; the pads of the first and second elements are substantially vertically aligned; and optical index differences n1n2 and n3n4 have opposite signs.

A complementary metal-oxide-semiconductor depth sensor element comprises a photogate formed in a photosensitive area on a substrate. A first transfer gate and a second transfer gate are formed respectively on two sides of the photogate in intervals. A first floating doped area and a second floating doped area are formed respectively on the outer sides of the first transfer gate and the second transfer gate. The first and second floating doped regions have dopants of a first polarity and the semiconductor area has dopants of a second polarity opposite to the first polarity. Since the photogate and at least parts of the first and second transfer gates connect to the same semiconductor area and no other dopants of polarity opposite to the second polarity. Therefore, the majority carriers from the photogate excited by lights drift, but not diffuse, to transfer to the first and second transfer gates.

A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV signal is above a highest voltage of a power supply. The erasing also includes applying the first HV signal to a local bit line (BL).

The ultraviolet sensor device comprises a semiconductor substrate, a dielectric layer above the substrate, a surface of the dielectric layer that is provided for the incidence of ultraviolet radiation, a floating gate electrode in the dielectric layer and an electrically conductive control gate electrode near the floating gate electrode. The control gate electrode is insulated from the floating gate electrode. A sensor layer is formed by an electrically conductive further layer that is electrically conductively connected to the floating gate electrode. The control gate electrode is arranged outside a region that is located between the sensor layer and the surface provided for the incidence of ultraviolet radiation. The sensor layer is discharged by incident UV radiation and can be charged or discharged electrically by charging or discharging the floating gate electrode.

Provided are a light-receiving element which has more capability of detecting wavelengths than that of existing silicon light-receiving elements and a unit pixel of an image sensor by using it. The light-receiving element includes: a light-receiving unit which is floated or connected to external voltage and absorbs light; an oxide film which is formed to come in contact with a side of the light-receiving unit; a source and a drain which stand off the light-receiving unit with the oxide film in between and face each other; a channel which is formed between the source and the drain and forms an electric current between the source and the drain; and a wavelength expanding layer which is formed in at least one among the light-receiving unit, the oxide film and the channel and forms a plurality of local energy levels by using strained silicon.