A time of flight sensor includes at least one demodulation pixel. Each demodulation pixel includes a semiconductor substrate; a charge generation region in the semiconductor substrate, the charge generation region having a lateral extent, the charge generation region being configured to convert light into charge carriers; a light directing element in the charge generation region of the semiconductor substrate, the light directing element being configured to direct light through at least a portion of the lateral extent of the charge generation region; a collection region in the semiconductor substrate, the collection region being configured to collect the charge carriers generated in at least a portion of the lateral extent of the charge generation region, and a readout component in electrical communication with the collection region, the readout component being operable to control an electrical coupling between the charge generation region and the collection region.

An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

There is provided an imaging device that includes photovoltaic type pixels that have photoelectric conversion regions generating photovoltaic power for each pixel depending on irradiation light; and an element isolation region that is provided between the photoelectric conversion regions of adjacent pixels and in a state of substantially surrounding the photoelectric conversion region.

An image sensor pixel having a hybrid transfer storage gate-storage diode storage node is disclosed herein. An example image sensor includes a photodiode, a storage diode, a transfer gate, and a buried storage well. The photodiode, storage diode, and buried storage well are all disposed in a semiconductor material. The transfer storage gate may be disposed on a surface of the semiconductor material between the photodiode and the storage diode. Further, the buried storage well may be disposed under the storage diode and partially under the transfer storage gate. Additionally, a length of the transfer storage gate and a length of the storage diode may be equal, and the storage diode may passivate a surface of the semiconductor material between the transfer storage gate and an output gate.

A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

An image sensor includes a semiconductor substrate having first and second faces. The sensor includes a plurality of pixel groups each including pixels, each pixel having a photoelectric converter and a wiring pattern, the converter including a region whose major carriers are the same with charges to be accumulated in the photoelectric converter. The sensor also includes a microlenses which are located so that one microlens is arranged for each pixel group. The wiring patterns are located at a side of the first face, and the plurality of microlenses are located at a side of the second face. Light-incidence faces of the regions of the photoelectric converters of each pixel group are arranged along the second face such that the light-incidence faces are apart from each other in a direction along the second face.

An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit also includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

A pixel arrangement includes a photodiode, a reset transistor configured to be controlled by a reset signal and coupled to a reset input voltage, a transfer gate transistor configured to transfer charge from the photodiode to a node, wherein the transfer gate transistor is controlled by a transfer gate voltage, and a source follower transistor controlled by the voltage on the node and coupled to a source follower voltage. A capacitor is coupled between the node and an input voltage. During a read operation the input voltage is increased to boost the voltage at the node. The increased input voltage may, for example, be one the reset input voltage, said source follower voltage, said transfer gate voltage and a boosting voltage.

Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.

A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.