A hybrid pixel sensor array is provided. Each pixel of the array comprises: a sensor for generating an imaging signal; a Charged-Coupled Device (CCD) array, coupled to the sensor so as to receive samples from the imaging signal and configured for storage of a plurality of samples; and active CMOS circuitry, coupled to the CCD array for generating a pixel output signal from the stored samples. The sensors of the pixels are part of a sensor portion of the hybrid pixel sensor array that is separate from both the CCD array and active CMOS circuitry of the pixels.

A binning system includes a red-green-blue-infrared (RGB-IR) image sensor including at least one pixel group composed of 22 sub-groups, each having 22 pixels including two green pixels, one infrared pixels and one red or blue pixel, the 22 sub-groups being arranged such that the pixel group is half green, one quarter infrared, one eighth red and one eighth blue; and a digital binning device that performs pixel binning on at least one addend pixel to result in a binned pixel. The binned pixel and the at least one addend pixel are located in a same pixel group.

A hybrid pixel sensor array is provided. Each pixel of the array comprises: a sensor for generating an imaging signal; a Charged-Coupled Device (CCD) array, coupled to the sensor so as to receive samples from the imaging signal and configured for storage of a plurality of samples; and active CMOS circuitry, coupled to the CCD array for generating a pixel output signal from the stored samples. The sensors of the pixels are part of a sensor portion of the hybrid pixel sensor array that is separate from both the CCD array and active CMOS circuitry of the pixels.

A method for fabricating an integrated device, the method including: forming a first level including a first mono-crystal layer, where forming the first level includes forming a plurality of single crystal transistors, a plurality of pixel control circuits, and a plurality of recessed channel transistors therein; disposing an overlying oxide on top of the first level; providing a second level including a second mono-crystal layer, where the second mono-crystal layer includes a plurality of image sensors; bonding the second level to the first level via an oxide-to-oxide bond such that the second level overlays the oxide; and including disposing a third level underneath the first level, where the third level includes a plurality of third transistors, and where the plurality of third transistors each include a single crystal channel.