H10F39/803

IMAGE SENSOR FOR PERFORMING AN ANALOG BINNING OPERATION
20250234113 · 2025-07-17 ·

Disclosed is an image sensor including first to fourth, fifth to eighth, ninth to 12.sup.th and 13.sup.th to 16.sup.th unit pixel circuits, a first readout line connected to the first and ninth unit pixel circuits, a second readout line connected to the fifth and 13.sup.th unit pixel circuits, a third readout line connected to the second and 10.sup.th unit pixel circuits, a fourth readout line connected to the sixth and 14.sup.th unit pixel circuits, a fifth readout line connected to the third and 11.sup.th unit pixel circuits, a sixth readout line connected to the seventh and 15.sup.th unit pixel circuits, a seventh readout line connected to the fourth and 12.sup.th unit pixel circuits, an eighth readout line connected to the eighth and 16.sup.th unit pixel circuits, first to fourth readout circuits, and a path selector connecting the unit pixel circuits to the readout circuits via the readout lines.

IMAGING ELEMENT, IMAGING APPARATUS, AND SEMICONDUCTOR ELEMENT

A voltage to be applied to a charge holding section to which charges generated by a plurality of photoelectric conversion sections are transferred is adjusted. An imaging element includes a plurality of photoelectric conversion sections, a charge holding section, a plurality of charge transfer sections, an image signal generation section, and a plurality of capacitive coupling wirings. The photoelectric conversion section performs photoelectric conversion of incident light to generate a charge. The charge holding section holds the generated charge. The charge transfer section is arranged for each photoelectric conversion section and transfers the generated charge to the charge holding section. The image signal generation section generates an image signal corresponding to the held electric charge. The capacitive coupling wirings are capacitively coupled to the charge holding section, and are individually applied with an adjustment signal for adjusting the potential of the charge holding section.

PHOTOELECTRIC CONVERSION APPARATUS, MANUFACTURING METHOD, AND EQUIPMENT
20250006750 · 2025-01-02 ·

A photoelectric conversion apparatus includes a semiconductor substrate that includes at least one pixel having a plurality of photoelectric conversion elements configured to receive light from a common microlens, wherein the semiconductor substrate includes a first surface that is formed of light-receiving surfaces of the plurality of photoelectric conversion elements and a second surface that faces the first surface, and the first surface has a concave shape, and at least a portion of the first surface is inclined with respect to the second surface.

IMAGE PICKUP ELEMENT, STACKED IMAGE PICKUP ELEMENT, AND SOLID IMAGE PICKUP APPARATUS

An image pickup element includes a photoelectric conversion section including a first electrode, a photoelectric conversion layer including an organic material, and a second electrode stacked on one another. Between the first electrode and the photoelectric conversion layer, an oxide semiconductor layer and an oxide film are formed from the first electrode side.

Photoelectric conversion apparatus and imaging system
12170855 · 2024-12-17 · ·

A photoelectric conversion apparatus includes a pulse shaping circuit that shapes an output from a diode of avalanche amplification type into a pulse, and a pulse conversion circuit that converts a pulse signal output from the pulse shaping circuit. The pulse conversion circuit converts a pulse signal having a first amplitude and output from the pulse shaping circuit into a pulse signal having a second amplitude smaller than the first amplitude.

Light detection devices with protective liner and methods related to same

Light detection devices and related methods are provided. The devices may comprise a reaction structure for containing a reaction solution with a relatively high or low pH and a plurality of reaction sites that generate light emissions. The devices may comprise a device base comprising a plurality of light sensors, device circuitry coupled to the light sensors, and a plurality of light guides that block excitation light but permit the light emissions to pass to a light sensor. The device base may also include a shield layer extending about each light guide between each light guide and the device circuitry, and a protection layer that is chemically inert with respect to the reaction solution extending about each light guide between each light guide and the shield layer. The protection layer prevents reaction solution that passes through the reaction structure and the light guide from interacting with the device circuitry.

SEMICONDUCTOR DEVICE AND PHOTODETECTOR
20250015104 · 2025-01-09 ·

[Problem] To shorten the reverse recovery time of a PN junction diode.

[Solution] A semiconductor device includes: a PN junction diode including an N-type first semiconductor region and a P-type second semiconductor region that are disposed in contact with each other at a PN junction surface, a third semiconductor region that is separated from the first semiconductor region and the second semiconductor region and is provided for discharge in a depletion layer formed around the PN junction surface when a reverse bias voltage is applied to the PN junction diode, a first electrode connected to the first semiconductor region, a second electrode connected to the second semiconductor region, and a third electrode connected to the third semiconductor region.

Solid-state imaging device with increased bonding strength, and method of manufacturing the solid-state imaging device

A solid-state imaging device capable of preventing variation in bonding strength in a bonding plane between a first semiconductor substrate and a second semiconductor substrate is provided. The solid-state imaging device includes a first semiconductor substrate having a plurality of first conductors, and a second semiconductor substrate bonded to the first semiconductor substrate and having a plurality of second conductors In a bonding plane between the first and second semiconductor substrates, the device includes regions where the conductors overlap, regions where insulating films and the conductors overlap, and regions where the insulating films overlap. The proportion of areas where the first insulating films and the second insulating films are bonded together to the bonding area between the first semiconductor substrate and the second semiconductor substrate is constant before and after the first semiconductor substrate and the second semiconductor substrate are bonded together.

Charge or a discharge of an output voltage rail of a plurality of pixels

The present description concerns a pixel array comprising one or a plurality of pixels (PIX1). Each pixel comprises a first transistor having its control node coupled to a photodiode, a first main conduction node coupled to a first output voltage rail (VS), and a second main conduction node coupled to a second voltage rail (VCS). The array comprises a variable impedance (404) coupling the first voltage rail (VS) to a first power supply rail (VDD) and a current source (402) coupling the second voltage rail (VCS) to a second power supply rail (GND), the variable impedance (404) being controlled based on a voltage on the second voltage rail (VCS). The array comprises a first switch (4002) coupling the second voltage rail (VCS) to a third voltage rail (VINIT1).

Image sensor

An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.