H10F39/8053

IMAGE SENSOR

An image sensor includes a first sub-pixel group including a plurality of first unit pixels, a first color filter, a first micro lens at least partially overlapping the plurality of first unit pixels, a second sub-pixel group including a plurality of second unit pixels, a second color filter, a second micro lens at least partially overlapping the plurality of second unit pixels, a third sub-pixel group including a plurality of third unit pixels, a third color filter, a third micro lens at least partially overlapping the plurality of third unit pixels, a first dead zone in which the first micro lens does not overlap the first sub-pixel group, a second dead zone in which the second micro lens does not overlap the second sub-pixel group, and a third dead zone in which the third micro lens does not overlap the third sub-pixel group.

OPTICAL SEMICONDUCTOR DEVICE WITH INTEGRATED VIAS IMPLEMENTING INTER-DIE CONNECTION
20250006767 · 2025-01-02 ·

The present application discloses an optical semiconductor device. The optical semiconductor device includes a logic die including a core circuit area and a logic peripheral circuit area; a memory die positioned on the logic die and including a memory cell area and a memory peripheral area, and a first inter-die via positioned in the memory peripheral area and electrically connected to the logic peripheral circuit area; and a sensor die positioned on the memory die and including a sensor pixel area and a sensor peripheral area, a first intra-die via positioned in the sensor peripheral area and electrically coupled to the logic peripheral circuit area through the first inter-die via, and a second intra-die via positioned in the sensor peripheral area. A height of the first intra-die via is greater than a height of the second intra-die via.

IMAGE SENSOR STRUCTURE
20250006760 · 2025-01-02 ·

An image sensor structure including an image stack disposed over a device stack. The image stack includes a plurality of light detectors. A first optical filter stack is disposed over the image stack. The first optical filter stack includes a light guide layer. Light pipe cavities are disposed in the light guide layer. Each light pipe cavity is associated with a light detector. Each light pipe cavity has an aspect ratio that is greater than about 2.5 to about 1. A nanowell layer is disposed over the first optical filter stack. Nanowells are disposed in the nanowell layer. Each nanowell is associated with a light detector.

Image sensors

Image sensors are provided. The image sensors may include a plurality of unit pixels and a color filter array on the plurality of unit pixels. The color filter array may include a color filter unit including four color filters that are arranged in a two-by-two array, and the color filter unit may include two yellow color filters, a cyan color filter, and one of a red color filter or a green color filter.

Pixel circuit, control method and image sensor

This application belongs to the technical field of semiconductor devices, and relates to a pixel circuit, a control method, and an image sensor, including: at least two pixel units arranged in an array, wherein transmission transistors of at least two pixels of at least one pixel unit are connected to a corresponding first group of transmission control lines, and a transmission transistor of one other pixel is connected to a corresponding second group of transmission control lines. Therefore, the pixel circuit, the control method and the image sensor provided in the present application can control the density of phase focus of the image sensor by controlling the first group of transmission control lines and the second group of transmission control lines without changing the structure of the pixel, the structure is simple, and the optical performance is good.

Image processing device for controlling pixel output level and operating method thereof

An image sensor includes a pixel array that includes a first pixel group located in a first row and including a first select transistor and a first floating diffusion region, a second pixel group located in a second row and including a second select transistor and a second floating diffusion region, and a column line connected to both the first pixel group and the second pixel group. While charges generated by a photoelectric conversion element of the first pixel group are transferred to the first floating diffusion region, the first select transistor is turned off, the second select transistor is turned on, and a first voltage is applied to the column line through the second select transistor. A photoelectric conversion element of the second pixel group generates charges prior to the photoelectric conversion element of the first pixel group, so as to be transferred to the second floating diffusion region.

Image sensor including a photodiode

An image sensor includes: a semiconductor substrate including a first surface and a second surface opposite to each other; a buried transfer gate electrode arranged in a transfer gate trench extending from the first surface of the semiconductor substrate into the semiconductor substrate, wherein the buried transfer gate electrode has an upper surface arranged at a level lower than that of the first surface of the semiconductor substrate with respect to the second surface of the semiconductor substrate; and a transfer gate spacer arranged on an upper sidewall of the transfer gate trench and on the buried transfer gate electrode.

Image sensor with pixel separation structure

Disclosed is an image sensor comprising a semiconductor substrate that includes first through fourth pixel regions, each including first through fourth photoelectric conversion sections, and a pixel separation structure disposed in the semiconductor substrate and separating the first through fourth pixel regions from each other. The second pixel region is spaced apart in a first direction from the first pixel region. The fourth pixel region is spaced apart in a second direction from the first pixel region. The second direction intersects the first direction. The semiconductor substrate includes first impurity sections disposed on corresponding central portions of the first through fourth pixel regions, and a second impurity section disposed between the second and fourth pixel regions. Impurities doped in the first impurity sections have a conductivity type different from that of impurities doped in the second impurity section.

IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC DEVICE INCLUDING THE IMAGE SENSOR
20240411147 · 2024-12-12 · ·

Provided is an image sensor including a sensor substrate including a first pixel configured to sense light of a first wavelength, and a second pixel configured to sense light of a second wavelength, and a color separating lens array configured to concentrate the light of the first wavelength on the first pixel, and the light of the second wavelength on the second pixel, the color separating lens array including a first pixel-corresponding area corresponding to the first pixel, and a second pixel-corresponding area corresponding to the second pixel, wherein a first phase difference between the light of the first wavelength that has traveled through a center of the first pixel-corresponding area and a center of the second pixel-corresponding area is different than a second phase difference between the light of the second wavelength that has traveled through the center of the first pixel-corresponding area and the center of the second pixel-corresponding area.

IMAGE SENSOR
20240413183 · 2024-12-12 ·

An image sensor includes a substrate having a plurality of pixel regions and a deep device isolation pattern disposed in the substrate between the pixel regions. The pixel regions include first, second, third, and fourth pixel regions, which are adjacent to each other in first and second directions. The deep device isolation pattern includes first portions interposed between the first and second pixel regions and between the third and fourth pixel regions and spaced apart from each other in the second direction, and second portions interposed between the first and third pixel regions and between the second and fourth pixel regions and spaced apart from each other in the first direction. The first pixel region includes a first extended active pattern, which is extended to the second pixel region in the first direction and is disposed between the first portions of the deep device isolation pattern.